Allow user to select cpu undervolt
There have been quite a few issues across the SANSA AMS line related
to CPU undervolting while most players show greatly increased runtime
some crash.
Rather than constanly upping the voltage we now have a
setting with a safe value for all players and the option for lower voltages
I plan to add a few other options here later such as disk
timings and maybe some other clocks/experimental settings
Added: Disk Low speed option for AS3525v2 devices cuts
frequency to 12 MHz from 24 MHz
Added: Disk Low speed option for AS3525v1 devices cuts
frequency to 15.5 MHz from 31 MHz
Added: I2c Low Speed AS3525 devices, should be bigger improvement for v1 devices
Fixed: Debug menu for AS3525v2 No SDSLOT frequency,
Showed IDE freq though it is unused
Added: DBOP and SSP underclocking affects display on v1/v2 respectively
Fixed: debug menu now has SSP frequency, and SSP_CPSR
Update: made settings menu more generic
Update: cleaned up code
Added: Clip v1 & Fuze v1 didn't have HAVE_ADJUSTABLE_CPU_VOLTAGE.
not sure why but, waiting on testing to confirm
Added: C200v2 and E200v2 devices and HAVE_ADJUSTABLE_CPU_VOLTAGE.
Fixed: v1 devices don't like display timing set lower (dbop)
v1 devices don't have a divider set for ssp (causes divide by 0)
Fixed: ClipZip display lags with Max SSP divider changed from 0xFE to 0x32
Fixed: v1 devices didn't work properly with highspeed sd cards
Added code from http://gerrit.rockbox.org/r/#/c/1704/
Added powersave and IDE interface enable/disable
Added: V2 devices now have powersave enabled on sd interface
Update: cleaned up code, lang defines, added manual entries
Update ssp clock mechanism added calculated ssp divider to clipzip
Update turn display clock off when clip+ turns off display
Fixed: clipzip wrong register for SSP clock
Change-Id: I04137682243be92f0f8d8bf1cfa54fbb1965559b
TODO: add other players?
I2c controller needs to be enabled in order to read CSPR0, CSPR1
registers function sets CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE
and only clears if it wasn't previously enabled
Use divider set in register to calculate frequency rather than
hard coded divider
Change-Id: I54ecc0c1859e906c00f4c2ae8ae2424a4619df98
Instead of checking ticks, set a sticky dirty flag that indicates
that the RTC needs to be read. This gives a timely update and more
accurate readout without actually reading the RTC until it changes.
The implementation should atomically read the flag and clear it.
Setting the flag would typically happen in an RTC tick ISR.
Change-Id: I6fd325f22845029a485c502c884812d3676026ea
1. Slightly revised and regularized internal interface. Callback is used
for read and write to provide completion signal instead of having two
mechanisms.
2. Lower overhead for asynchronous or alterate completion callbacks. We
now only init what is required by the transfer. A couple unneeded
structure members were also nixed.
3. Fixes a bug that would neglect a semaphore wait if pumping the I2C
interrupts in a loop when not in thread state or interrupts are masked.
4. Corrects broken initialization order by defining KDEV_INIT, which
makes kernel_init() call kernel_device_init() to initialize additional
devices _after_ the kernel, threading and synchronization objects are
safe to use.
5. Locking set_cpu_frequency has to be done at the highest level in
system.c to ensure the boost counter and the frequency are both set in
agreement. Reconcile the locking inteface between PP and AMS (the only
two currently using locking there) to keep it clean.
Now works fine with voltages in GIT HEAD on my Fuze v2, type 0.
Previously, everything crashed and died instantly. action.c calling
set_cpu_frequency from a tick was part of it. The rest may have been
related to 3. and 4. Honestly, I'm not certain!
Testing by Mihail Zenkov indicates it solves our problems. This will
get the developer builds running again after the kernel assert code
push.
Change-Id: Ie245994fb3e318dd5ef48e383ce61fdd977224d4
Interrupts version is cause of freeze on USB extraction.
Also non-interrupts version much simpler and faster.
Change-Id: I30a2993cdcaa85abfba77ca06bfacd5b6b4353e2
It was possible for interrupts of higher priority than the current IRQ
level to attempt to restart the interface while it was still active on
a transfer. The list modification also wasn't protected within the I2C
ISR itself.
Change-Id: I70635c307a1443bba6801c588cf1efde299db9a4
move prototypes to ascodec.h
move code to ascodec*.c
YPR0: use adc-as3514.c instead of duplicating it
TODO: merge as3514.h and ascodec.h ?
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31626 a1c6a512-1295-4272-9138-f99709370657
We need it for correct charger detection if we boot with charger plugged
because there is no edge interrupt
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26936 a1c6a512-1295-4272-9138-f99709370657
reorder static functions to avoid the need for early prototypes
panic if the INT_AUDIO callback could not read the 3 IRQ_ENRD registers
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26445 a1c6a512-1295-4272-9138-f99709370657
- Enable end of charge monitoring once, it doesn't need to be disabled
- Acknowledge the first (wrong) end of charge interrupt on charger enable
(this had been broken in r25299)
- Centralize reads to ENRD* registers and cache the results when needed
- on PP it is not needed because reads are atomic, we only check for
end of charge when the charging, and for charger presence when
discharging
as3525v2 (using as3543) specifics
- I got the datasheet today from AMS, thanks to them for being so fast
and not require me to sign tons of papers!
- USB detection now works on as3525v2 using the as3543. Clip+ won't
reboot to OF yet, it needs mkamsboot support first (usbstack disabled)
- Charging should work, the CHARGER register is at a different place, it
is an extended PMU register -> use ascodec_read/write_charger() to
access it
- real interrupts are not used yet for ENRD, we get thousands of
interrupts per second, apparently only limited by the i2c clock.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26116 a1c6a512-1295-4272-9138-f99709370657
i2c clock frequency uses pclk as reference, not plla
i2c clock divider is only 10 bits, not 16
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20929 a1c6a512-1295-4272-9138-f99709370657
