as3525: reverting I2C2 to non-interrupts version
Interrupts version is cause of freeze on USB extraction. Also non-interrupts version much simpler and faster. Change-Id: I30a2993cdcaa85abfba77ca06bfacd5b6b4353e2
This commit is contained in:
Mihail Zenkov
parent
ce90c0481a
commit
c7daef36c5
4 changed files with 126 additions and 402 deletions
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@ -26,40 +26,18 @@
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/* Read 10-bit channel data */
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unsigned short adc_read(int channel)
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{
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unsigned short data = 0;
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if ((unsigned)channel >= NUM_ADC_CHANNELS)
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return 0;
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unsigned char buf[2];
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ascodec_lock();
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/* Select channel */
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if (ascodec_write(AS3514_ADC_0, (channel << 4)) >= 0)
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{
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unsigned char buf[2];
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ascodec_write(AS3514_ADC_0, (channel << 4));
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/*
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* The AS3514 ADC will trigger an interrupt when the conversion
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* is finished, if the corresponding enable bit in IRQ_ENRD2
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* is set.
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* Previously the code did not wait and this apparently did
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* not pose any problems, but this should be more correct.
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* Without the wait the data read back may be completely or
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* partially (first one of the two bytes) stale.
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*/
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ascodec_wait_adc_finished();
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/* Read data */
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if (ascodec_readbytes(AS3514_ADC_0, 2, buf) >= 0)
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{
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data = (((buf[0] & 0x3) << 8) | buf[1]);
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}
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}
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ascodec_readbytes(AS3514_ADC_0, 2, buf);
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ascodec_unlock();
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return data;
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return (((buf[0] & 0x3) << 8) | buf[1]);
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}
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void adc_init(void)
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@ -37,13 +37,11 @@ void ascodec_close(void);
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void ascodec_lock(void);
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void ascodec_unlock(void);
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int ascodec_write(unsigned int index, unsigned int value);
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void ascodec_write(unsigned int index, unsigned int value);
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int ascodec_read(unsigned int index);
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int ascodec_readbytes(unsigned int index, unsigned int len, unsigned char *data);
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void ascodec_wait_adc_finished(void);
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void ascodec_readbytes(unsigned int index, unsigned int len, unsigned char *data);
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#if CONFIG_CHARGING
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bool ascodec_endofch(void);
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@ -24,7 +24,7 @@
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This part is on address 0x46 of the internal i2c bus in the as3525.
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Registers in the codec part seem to be nearly identical to the registers
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in the AS3514 (used in the "v1" versions of the sansa c200 and e200).
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I2C register description:
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* I2C2_CNTRL needs to be set to 0x51 for transfers to work at all.
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bit 0: ? possibly related to using ACKs during transfers
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@ -39,7 +39,7 @@
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* I2C2_SLAD0 contains the i2c slave address to read from / write to.
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* I2C2_CPSR0/1 is the divider from the peripheral clock to the i2c clock.
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* I2C2_DACNT sets the number of bytes to transfer and actually starts it.
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When a transfer is attempted to a non-existing i2c slave address,
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interrupt bit 7 is raised and DACNT is not decremented after the transfer.
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*/
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@ -50,6 +50,7 @@
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#include "system.h"
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#include "as3525.h"
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#include "i2c.h"
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#include "logf.h"
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#define I2C2_DATA *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x00))
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#define I2C2_SLAD0 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x04))
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@ -77,223 +78,50 @@
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#define I2C2_IRQ_RXOVER 0x10
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#define I2C2_IRQ_ACKTIMEO 0x80
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#define REQ_UNFINISHED 0
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#define REQ_FINISHED 1
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#define REQ_RETRY 2
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#ifdef DEBUG
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#define IFDEBUG(x) x
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#else
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#define IFDEBUG(x)
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#endif
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#define ASCODEC_REQ_READ 0
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#define ASCODEC_REQ_WRITE 1
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/*
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* How many bytes we using in struct ascodec_request for the data buffer.
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* 4 fits the alignment best right now.
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* We don't actually use more than 3 at the moment (when reading interrupts)
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* Upper limit would be 255 since DACNT is 8 bits!
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*/
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#define ASCODEC_REQ_MAXLEN 4
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typedef void (ascodec_cb_fn)(unsigned const char *data, unsigned cnt);
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struct ascodec_request {
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unsigned char type;
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unsigned char index;
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unsigned char status;
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unsigned char cnt;
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unsigned char data[ASCODEC_REQ_MAXLEN];
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struct semaphore complete;
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ascodec_cb_fn *callback;
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struct ascodec_request *next;
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};
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static struct mutex as_mtx;
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static unsigned long ascodec_enrd0_shadow = 0;
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#if CONFIG_CHARGING
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static bool chg_status = false;
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static bool endofch = false;
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#endif
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static unsigned char *req_data_ptr = NULL;
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static struct ascodec_request *req_head = NULL;
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static struct ascodec_request *req_tail = NULL;
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static struct semaphore adc_done_sem;
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static struct ascodec_request as_audio_req;
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#ifdef DEBUG
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static int int_audio_ctr = 0;
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static int int_chg_finished = 0;
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static int int_chg_insert = 0;
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static int int_chg_remove = 0;
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static int int_usb_insert = 0;
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static int int_usb_remove = 0;
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static int int_rtc = 0;
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static int int_adc = 0;
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#endif /* DEBUG */
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/* returns != 0 when busy */
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static inline int i2c_busy(void)
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/* returns true when busy */
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static inline bool i2c_busy(void)
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{
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return (I2C2_SR & 1);
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}
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static void ascodec_finish_req(struct ascodec_request *req)
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{
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/*
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* Wait if still busy, unfortunately this happens since
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* the controller is running at a low divisor, so it's
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* still busy when we serviced the interrupt.
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* I tried upping the i2c speed to 4MHz which
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* made the number of busywait cycles much smaller
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* (none for reads and only a few for writes),
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* but who knows if it's reliable at that frequency. ;)
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* For one thing, 8MHz doesn't work, so 4MHz is likely
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* borderline.
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* In general writes need much more wait cycles than reads
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* for some reason, possibly because we read the data register
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* for reads, which will likely block the processor while
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* the i2c controller responds to the register read.
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*/
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while (i2c_busy());
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req->status = 1;
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if (req->callback) {
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req->callback(req->data, req_data_ptr - req->data);
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}
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semaphore_release(&req->complete);
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}
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static int ascodec_continue_req(struct ascodec_request *req, int irq_status)
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{
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if ((irq_status & (I2C2_IRQ_RXOVER|I2C2_IRQ_ACKTIMEO)) > 0) {
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/* some error occured, restart the request */
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return REQ_RETRY;
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}
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if (req->type == ASCODEC_REQ_READ &&
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(irq_status & I2C2_IRQ_RXFULL) > 0) {
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*(req_data_ptr++) = I2C2_DATA;
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} else {
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if (req->cnt > 1 &&
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(irq_status & I2C2_IRQ_TXEMPTY) > 0) {
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I2C2_DATA = *(req_data_ptr++);
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}
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}
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req->index++;
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if (--req->cnt > 0)
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return REQ_UNFINISHED;
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return REQ_FINISHED;
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}
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static void ascodec_start_req(struct ascodec_request *req)
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{
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int unmask = 0;
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/* enable clock */
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bitset32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE);
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/* start transfer */
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I2C2_SADDR = req->index;
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if (req->type == ASCODEC_REQ_READ) {
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req_data_ptr = req->data;
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/* start transfer */
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I2C2_CNTRL = I2C2_CNTRL_DEFAULT | I2C2_CNTRL_READ;
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unmask = I2C2_IRQ_RXFULL|I2C2_IRQ_RXOVER;
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} else {
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req_data_ptr = &req->data[1];
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I2C2_CNTRL = I2C2_CNTRL_DEFAULT | I2C2_CNTRL_WRITE;
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I2C2_DATA = req->data[0];
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unmask = I2C2_IRQ_TXEMPTY|I2C2_IRQ_ACKTIMEO;
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}
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I2C2_DACNT = req->cnt;
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I2C2_IMR |= unmask; /* enable interrupts */
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}
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void INT_I2C_AUDIO(void)
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{
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struct ascodec_request *req = req_head;
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int irq_status = I2C2_MIS;
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int status = ascodec_continue_req(req, irq_status);
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I2C2_INT_CLR = irq_status; /* clear interrupt status */
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if (status != REQ_UNFINISHED) {
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/* mask rx/tx interrupts */
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I2C2_IMR &= ~(I2C2_IRQ_TXEMPTY|I2C2_IRQ_RXFULL|
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I2C2_IRQ_RXOVER|I2C2_IRQ_ACKTIMEO);
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if (status == REQ_FINISHED)
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ascodec_finish_req(req);
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int oldlevel = disable_irq_save(); /* IRQs are stacked */
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/*
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* If status == REQ_RETRY, this will restart
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* the request because we didn't remove it from
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* the request list
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*/
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if (status == REQ_FINISHED) {
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req_head = req->next;
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req->next = NULL;
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}
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if (req_head == NULL) {
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req_tail = NULL;
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/* disable clock */
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bitclr32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE);
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} else {
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ascodec_start_req(req_head);
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}
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restore_irq(oldlevel);
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}
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}
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void i2c_init(void)
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{
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}
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/* initialises the internal i2c bus and prepares for transfers to the codec */
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void ascodec_init(void)
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static void i2c2_init(void)
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{
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int prescaler;
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mutex_init(&as_mtx);
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semaphore_init(&adc_done_sem, 1, 0);
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/* enable clock */
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bitset32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE);
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/* prescaler for i2c clock */
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prescaler = AS3525_I2C_PRESCALER;
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I2C2_CPSR0 = prescaler & 0xFF; /* 8 lsb */
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I2C2_CPSR1 = (prescaler >> 8) & 0x3; /* 2 msb */
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/* set i2c slave address of codec part */
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I2C2_SLAD0 = AS3514_I2C_ADDR << 1;
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I2C2_CNTRL = I2C2_CNTRL_DEFAULT;
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I2C2_IMR = 0x00; /* disable interrupts */
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I2C2_INT_CLR = I2C2_RIS; /* clear interrupt status */
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VIC_INT_ENABLE = INTERRUPT_I2C_AUDIO;
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VIC_INT_ENABLE = INTERRUPT_AUDIO;
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}
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/* detect if USB was connected at startup since there is no transition */
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ascodec_enrd0_shadow = ascodec_read(AS3514_IRQ_ENRD0);
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if(ascodec_enrd0_shadow & USB_STATUS)
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usb_insert_int();
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else
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usb_remove_int();
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/* initialises the internal i2c bus and prepares for transfers to the codec */
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void ascodec_init(void)
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{
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mutex_init(&as_mtx);
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/* enable clock */
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bitset32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE);
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i2c2_init();
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/* Generate irq for usb+charge status change */
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ascodec_write(AS3514_IRQ_ENRD0,
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@ -305,242 +133,172 @@ void ascodec_init(void)
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#if CONFIG_CPU == AS3525v2
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/* XIRQ = IRQ, active low reset signal, 6mA push-pull output */
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ascodec_write_pmu(0x1a, 3, (1<<2)|3); /* 1A-3 = Out_Cntr3 register */
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/* Generate irq on (rtc,) adc change */
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ascodec_write(AS3514_IRQ_ENRD2, /*IRQ_RTC |*/ IRQ_ADC);
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/* reset for compatible with old bootloader */
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ascodec_write(AS3514_IRQ_ENRD2, 0x0);
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#else
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/* Generate irq for push-pull, active high, irq on rtc+adc change */
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ascodec_write(AS3514_IRQ_ENRD2, IRQ_PUSHPULL | IRQ_HIGHACTIVE |
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/*IRQ_RTC |*/ IRQ_ADC);
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ascodec_write(AS3514_IRQ_ENRD2, IRQ_PUSHPULL | IRQ_HIGHACTIVE);
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#endif
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VIC_INT_ENABLE = INTERRUPT_AUDIO;
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/* detect if USB was connected at startup since there is no transition */
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int data = ascodec_read(AS3514_IRQ_ENRD0);
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if(data & USB_STATUS)
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usb_insert_int();
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#if CONFIG_CHARGING
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chg_status = data & CHG_STATUS;
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#endif
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}
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static void ascodec_req_init(struct ascodec_request *req, int type,
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unsigned int index, unsigned int cnt)
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/* returns false if transfer incomplete */
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static bool i2c2_transfer(void)
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{
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semaphore_init(&req->complete, 1, 0);
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req->next = NULL;
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req->callback = NULL;
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req->type = type;
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req->index = index;
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req->cnt = cnt;
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}
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static int try = 0;
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static void ascodec_submit(struct ascodec_request *req)
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{
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int oldlevel = disable_irq_save();
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/* wait for transfer*/
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int i = 10000;
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while (I2C2_DACNT != 0 && i--);
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req->status = 0;
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if (!i) {
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if (try == 5)
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panicf("I2C2 reset failed");
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if (req_head == NULL) {
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req_tail = req_head = req;
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ascodec_start_req(req);
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} else {
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req_tail->next = req;
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req_tail = req;
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logf("reset I2C2 %d", try);
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i2c2_init();
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try++;
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return false;
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}
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restore_irq(oldlevel);
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try = 0;
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return true;
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}
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static void ascodec_wait(struct ascodec_request *req)
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void ascodec_write(unsigned int index, unsigned int value)
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{
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/* NOTE: Only safe from thread context */
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ascodec_lock();
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if (irq_enabled()) {
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semaphore_wait(&req->complete, TIMEOUT_BLOCK);
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return;
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}
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while (req->status == 0) {
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if (I2C2_MIS) INT_I2C_AUDIO();
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}
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}
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/*
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* The request struct passed in must be allocated statically.
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* If you call ascodec_async_write from different places, each
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* call needs it's own request struct.
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*/
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static void ascodec_async_write(unsigned int index, unsigned int value,
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struct ascodec_request *req)
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{
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#ifndef HAVE_AS3543
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if (index == AS3514_CVDD_DCDC3) /* prevent setting of the LREG_CP_not bit */
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value &= ~(1 << 5);
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#endif
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ascodec_req_init(req, ASCODEC_REQ_WRITE, index, 1);
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req->data[0] = value;
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ascodec_submit(req);
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do {
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/* wait if still busy */
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while (i2c_busy());
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/* start transfer */
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I2C2_SADDR = index;
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I2C2_CNTRL &= ~(1 << 1);
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I2C2_DATA = value;
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I2C2_DACNT = 1;
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} while (!i2c2_transfer());
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ascodec_unlock();
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}
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/* returns 0 on success, <0 otherwise */
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int ascodec_write(unsigned int index, unsigned int value)
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{
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struct ascodec_request req;
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ascodec_async_write(index, value, &req);
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ascodec_wait(&req);
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return 0;
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}
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/*
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* The request struct passed in must be allocated statically.
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* If you call ascodec_async_read from different places, each
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* call needs it's own request struct.
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* If len is bigger than ASCODEC_REQ_MAXLEN it will be
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* set to ASCODEC_REQ_MAXLEN.
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*/
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static void ascodec_async_read(unsigned int index, unsigned int len,
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struct ascodec_request *req, ascodec_cb_fn *cb)
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{
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if (len > ASCODEC_REQ_MAXLEN)
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len = ASCODEC_REQ_MAXLEN; /* can't fit more in one request */
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ascodec_req_init(req, ASCODEC_REQ_READ, index, len);
|
||||
req->callback = cb;
|
||||
ascodec_submit(req);
|
||||
}
|
||||
|
||||
/* returns value read on success, <0 otherwise */
|
||||
int ascodec_read(unsigned int index)
|
||||
{
|
||||
struct ascodec_request req;
|
||||
int data;
|
||||
|
||||
ascodec_async_read(index, 1, &req, NULL);
|
||||
ascodec_wait(&req);
|
||||
ascodec_lock();
|
||||
|
||||
return req.data[0];
|
||||
do {
|
||||
/* wait if still busy */
|
||||
while (i2c_busy());
|
||||
|
||||
/* start transfer */
|
||||
I2C2_SADDR = index;
|
||||
I2C2_CNTRL |= (1 << 1);
|
||||
I2C2_DACNT = 1;
|
||||
|
||||
} while (!i2c2_transfer());
|
||||
|
||||
data = I2C2_DATA;
|
||||
|
||||
ascodec_unlock();
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
int ascodec_readbytes(unsigned int index, unsigned int len, unsigned char *data)
|
||||
void ascodec_readbytes(unsigned int index, unsigned int len, unsigned char *data)
|
||||
{
|
||||
int i, j;
|
||||
struct ascodec_request req;
|
||||
unsigned int i;
|
||||
|
||||
/* index and cnt will be filled in later, just use 0 */
|
||||
ascodec_req_init(&req, ASCODEC_REQ_READ, 0, 0);
|
||||
|
||||
i = 0;
|
||||
while (len > 0) {
|
||||
int cnt = len > ASCODEC_REQ_MAXLEN ? ASCODEC_REQ_MAXLEN : len;
|
||||
|
||||
req.index = index;
|
||||
req.cnt = cnt;
|
||||
|
||||
ascodec_submit(&req);
|
||||
ascodec_wait(&req);
|
||||
|
||||
for (j=0; j<cnt; j++) data[i++] = req.data[j];
|
||||
|
||||
len -= cnt;
|
||||
index += cnt;
|
||||
}
|
||||
|
||||
return i;
|
||||
for(i = 0; i < len; i++)
|
||||
data[i] = ascodec_read(index+i);
|
||||
}
|
||||
|
||||
#if CONFIG_CPU == AS3525v2
|
||||
void ascodec_write_pmu(unsigned int index, unsigned int subreg,
|
||||
unsigned int value)
|
||||
{
|
||||
struct ascodec_request reqs[2];
|
||||
|
||||
int oldstatus = disable_irq_save();
|
||||
ascodec_lock();
|
||||
/* we submit consecutive requests to make sure no operations happen on the
|
||||
* i2c bus between selecting the sub register and writing to it */
|
||||
ascodec_async_write(AS3543_PMU_ENABLE, 8 | subreg, &reqs[0]);
|
||||
ascodec_async_write(index, value, &reqs[1]);
|
||||
restore_irq(oldstatus);
|
||||
ascodec_write(AS3543_PMU_ENABLE, 8 | subreg);
|
||||
ascodec_write(index, value);
|
||||
|
||||
/* Wait for second request to finish */
|
||||
ascodec_wait(&reqs[1]);
|
||||
ascodec_unlock();
|
||||
}
|
||||
|
||||
int ascodec_read_pmu(unsigned int index, unsigned int subreg)
|
||||
{
|
||||
struct ascodec_request reqs[2];
|
||||
|
||||
int oldstatus = disable_irq_save();
|
||||
ascodec_lock();
|
||||
/* we submit consecutive requests to make sure no operations happen on the
|
||||
* i2c bus between selecting the sub register and reading it */
|
||||
ascodec_async_write(AS3543_PMU_ENABLE, subreg, &reqs[0]);
|
||||
ascodec_async_read(index, 1, &reqs[1], NULL);
|
||||
restore_irq(oldstatus);
|
||||
ascodec_write(AS3543_PMU_ENABLE, subreg);
|
||||
int ret = ascodec_read(index);
|
||||
|
||||
/* Wait for second request to finish */
|
||||
ascodec_wait(&reqs[1]);
|
||||
ascodec_unlock();
|
||||
|
||||
return reqs[1].data[0];
|
||||
return ret;
|
||||
}
|
||||
#endif /* CONFIG_CPU == AS3525v2 */
|
||||
|
||||
static void ascodec_read_cb(unsigned const char *data, unsigned int len)
|
||||
void INT_AUDIO(void)
|
||||
{
|
||||
if (UNLIKELY(len != 3)) /* some error happened? */
|
||||
panicf("INT_AUDIO callback got %d regs", len);
|
||||
int oldstatus = disable_irq_save();
|
||||
int data = ascodec_read(AS3514_IRQ_ENRD0);
|
||||
|
||||
if (data[0] & CHG_ENDOFCH) { /* chg finished */
|
||||
ascodec_enrd0_shadow |= CHG_ENDOFCH;
|
||||
IFDEBUG(int_chg_finished++);
|
||||
#if CONFIG_CHARGING
|
||||
if (data & CHG_ENDOFCH) { /* chg finished */
|
||||
endofch = true;
|
||||
}
|
||||
if (data[0] & CHG_CHANGED) { /* chg status changed */
|
||||
if (data[0] & CHG_STATUS) {
|
||||
ascodec_enrd0_shadow |= CHG_STATUS;
|
||||
IFDEBUG(int_chg_insert++);
|
||||
} else {
|
||||
ascodec_enrd0_shadow &= ~CHG_STATUS;
|
||||
IFDEBUG(int_chg_remove++);
|
||||
}
|
||||
}
|
||||
if (data[0] & USB_CHANGED) { /* usb status changed */
|
||||
if (data[0] & USB_STATUS) {
|
||||
IFDEBUG(int_usb_insert++);
|
||||
|
||||
chg_status = data & CHG_STATUS;
|
||||
#endif
|
||||
|
||||
if (data & USB_CHANGED) { /* usb status changed */
|
||||
if (data & USB_STATUS) {
|
||||
usb_insert_int();
|
||||
} else {
|
||||
IFDEBUG(int_usb_remove++);
|
||||
usb_remove_int();
|
||||
}
|
||||
}
|
||||
if (data[2] & IRQ_RTC) { /* rtc irq */
|
||||
/*
|
||||
* Can be configured for once per second or once per minute,
|
||||
* default is once per second
|
||||
*/
|
||||
IFDEBUG(int_rtc++);
|
||||
}
|
||||
if (data[2] & IRQ_ADC) { /* adc finished */
|
||||
IFDEBUG(int_adc++);
|
||||
semaphore_release(&adc_done_sem);
|
||||
}
|
||||
VIC_INT_ENABLE = INTERRUPT_AUDIO;
|
||||
}
|
||||
|
||||
void INT_AUDIO(void)
|
||||
{
|
||||
VIC_INT_EN_CLEAR = INTERRUPT_AUDIO;
|
||||
IFDEBUG(int_audio_ctr++);
|
||||
|
||||
ascodec_async_read(AS3514_IRQ_ENRD0, 3, &as_audio_req, ascodec_read_cb);
|
||||
}
|
||||
|
||||
void ascodec_wait_adc_finished(void)
|
||||
{
|
||||
semaphore_wait(&adc_done_sem, TIMEOUT_BLOCK);
|
||||
restore_irq(oldstatus);
|
||||
}
|
||||
|
||||
#if CONFIG_CHARGING
|
||||
bool ascodec_endofch(void)
|
||||
{
|
||||
bool ret = ascodec_enrd0_shadow & CHG_ENDOFCH;
|
||||
bitclr32(&ascodec_enrd0_shadow, CHG_ENDOFCH); /* clear interrupt */
|
||||
int oldstatus = disable_irq_save();
|
||||
bool ret = endofch;
|
||||
endofch = false;
|
||||
restore_irq(oldstatus);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
bool ascodec_chg_status(void)
|
||||
{
|
||||
return ascodec_enrd0_shadow & CHG_STATUS;
|
||||
return chg_status;
|
||||
}
|
||||
|
||||
void ascodec_monitor_endofch(void)
|
||||
|
|
@ -567,15 +325,6 @@ int ascodec_read_charger(void)
|
|||
}
|
||||
#endif /* CONFIG_CHARGING */
|
||||
|
||||
/*
|
||||
* NOTE:
|
||||
* After the conversion to interrupts, ascodec_(lock|unlock) are only used by
|
||||
* adc-as3514.c to protect against other threads corrupting the result by using
|
||||
* the ADC at the same time.
|
||||
* Concurrent ascodec_(async_)?(read|write) calls are instead protected
|
||||
* because ascodec_submit() is atomic and concurrent requests will wait
|
||||
* in the queue until the current request is finished.
|
||||
*/
|
||||
void ascodec_lock(void)
|
||||
{
|
||||
mutex_lock(&as_mtx);
|
||||
|
|
|
|||
|
|
@ -137,7 +137,6 @@ static const struct { int source; void (*isr) (void); } vec_int_srcs[] =
|
|||
{ INT_SRC_USB, INT_USB_FUNC, },
|
||||
{ INT_SRC_TIMER1, INT_TIMER1 },
|
||||
{ INT_SRC_TIMER2, INT_TIMER2 },
|
||||
{ INT_SRC_I2C_AUDIO, INT_I2C_AUDIO },
|
||||
{ INT_SRC_AUDIO, INT_AUDIO },
|
||||
/* Lowest priority at the end of the list */
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue