This flash chip is found on some Surfans F20 units. For our purposes
it's the same as the GD5F1GA4xExx so just #define an alias instead of
adding a whole new chip struct.
Change-Id: I2f4c4fbf1faf3a0c7a1503534430afacbddc426e
The bootloader backup is intentionally simple, but it's a little
*too* simple. Add a sanity check to make sure what we're backing
up or restoring contains the first 8 bytes of the SPL header.
This isn't going to catch all possible problems, but it'll stop
obviously non-functional backups from being restored.
Change-Id: I6e80351aeb96c467f0514bd0ecd77d94ff72a8f8
Merge the x1000 and jz47xx exception handling code since they use
the same exception vectors and handlers. The interrupt handler is
now called from the common exception vector, but remains separate
for each board since they have different IRQ layouts.
The new exception handler can provide a stack traceback from the
interrupted code, rather than the (uninteresting) caller traceback
displayed by panicf. This allows you to see what led up to a null
pointer deref or division by zero, which makes it _much_ easier to
track down errors that occur in common leaf functions like strcmp.
Change-Id: I59a0ebb5e40fcb36505c3bfdb47f8cac2f9936b1
allow buflib_free to check for invalid or already freed handles
within the function -- remove all the invalid handle guards thru core_free
Change-Id: Ibdcbc82760fc93b674c42283fca420d94907df8e
Instead of putting "#ifdef LCD_STRIDEFORMAT" at every usage of the
macro it's simpler to have config.h define LCD_STRIDEFORMAT to the
default of horizontal stride when the target leaves it unspecified.
Change-Id: Ib187012aad65ac678dbd837b1464a83bad722411
This is another chip used in newer Surfans F20 units. Like the
Winbond chip, it's a 1-gigabit chip with on-die ECC. Notably it
has an expanded 128-byte OOB area that is only accessible when
on-die ECC is disabled.
Change-Id: I2203918a15c914097f5a6bbe4afa2d3a60dc67f7
This chip is apparently used in some Surfans F20 units, and has
the same geometry as the ATO25D1GA. It has an on-die ECC engine.
Change-Id: I4d37a2455620ce43cec0a9bcbb32c776d1a8eba1
Decouple chip IDs from chips, and allow the chip ID table to list
which read ID method should be used. Use a safe controller setup
during identification instead of using the first chip's parameters.
Change-Id: Ia725959c31b2838f4a3a30e5bb7fa6652ef377ed
There is actually no need to parameterize most commands with row
or column cycles, usually the opcode and row/column address width
are linked. When this is not the case we can use raw SFC commands
or define new macros.
Change-Id: I22459d732dc01012e6a8ae026c4fb85495d372b4
Using predefined commands is too inflexible so allow the chip data
to specify I/O commands directly.
Change-Id: Ie8f943914da4b8299678a59b1063c4c6d226e83e
Use per-function sections to avoid linking in x1000_boot_linux()
on normal builds, which prevents link errors due to referencing
a non-existent usb_close().
Change-Id: Ied7b233603c49fc856db8445e368675b181e2f1f
Many SPI NAND flash chips have on-die ECC engines that report
ECC status via the status feature register. This code handles
the common case where ECC status is reported with 2 bits: one
bit to indicate if flips were detected & corrected, and another
bit to indicate an uncorrectable error.
Change-Id: I5d587cd960ca9d090d2629e890724a6bc411e70c
Using 'typedef struct' is not in line with the project coding style
and somewhat problematic, so get rid of it here.
Change-Id: Icfe79de72ed82cb7526e9f4e8296ec12084c01ac
Some components have additional ID bytes. Add support for an
optional 2nd device ID byte during the identification routine.
Change-Id: I5bbad73fb57004067c6f13f223f7bf4d43ff7849
If the USB controller is active when we hand over to Linux it'll
often trigger "irq nobody cared" warnings. Disabling the controller
before boot prevents that.
Also move the USB PHY bit workaround from the dualboot cleanup hook
to the main Linux boot function. Mainline kernels don't clear these
bits either.
Change-Id: Ieaf896c3b8c3e58a8c47de5afeb384ae2511a5fa
The flash probe mimics the boot ROM's flash read routines and
dumps the manufacturer & device IDs and 16-byte parameter data
to a file on the SD card.
Change-Id: I3d413bd0cc05a9d7f2285b85454420c3e90274e9
Hold "Play" to boot the OF, or boot it from the recovery menu
by holding "Vol. Up". If you had the hosted port installed on your
player before installing the native port, you'll still have to go
through the hosted bootloader.
A couple notes:
- When booting from the menu, the recovery menu disappears, then
reappears before going into the OF.
- You need to hold the play button for like a half second after the
blue light comes on in order to get into the OF.
The recovery appears to be there, but it doesn't seem to be intended
for end users - it just says "Updater V1.1 - Insert TF Pls". I haven't
tested it beyond seeing that it boots, so I'm going to comment it out
for now.
Change-Id: Ie271ee479bb628cc74141b7fe07273b3f193f358
Enables multiboot for the FiiO M3K, Shanling Q1, and Eros Q native port.
Note this requires an up-to-date Rockbox _and_ bootloader.
Usage instructions will (eventually) be found on the wiki:
https://www.rockbox.org/wiki/MultibootBootloader
Change-Id: Ia2da1ad6ef611e499d2fbafa93838387bc1023ba
There should be no need for any compatibility hacks since this
value was mostly used internally between the SPL and bootloader.
clk_init() was the only user in the main Rockbox binary which
accessed it, but when loaded by the Rockbox bootloader that code
will not be reached since BOOT_FLAG_CLK_INIT is already set.
Change-Id: Idd68b9834172e652b47432bfb1e00c923ea35407
Removes the SPL's dual boot support code, and removes the dual
boot selection code on the M3K and Q1 since they can now do it
from the main bootloader.
Change-Id: Ie1b27e98c6ed4b3e37db86cfb485d6f3a6c5b25e
Calling multiple levels of indirection in a loop slows things down
Really these need to be rewritten to take a start and end address
like most of the rest of the codebase
But this is safer without having test hardware in hand
Change-Id: Idae7b92ee779d020ed7fcc9334e2d5a9c710e64d
Replace inline section copy/fill loops with subroutines, which
reduces code size a bit and and handle zero size copies properly.
Remove the cache initialization loop as well. There's no actual
reason for this because the SPL initializes the caches and just
dropping the cache can even be harmful (in this case it wasn't,
because the SPL flushes the whole cache right before calling in).
Change-Id: I7cddc9ed6d060b1f1bdd75544297883d014cad2d
This is intended for debugging OF kernel boot problems and has
to be enabled manually at compile time to make it usable.
Change-Id: Ie5ce9f0a7639be0acf5e3879cfc3a7b8b89caa5c
Two helpers (_init_clocktree and _init_uart2) already existed in
the SPL and are copied verbatim from there. The SPL versions are
still present and will be removed when dual boot works from the
main bootloader.
The other two helpers (_cleanup and _load_pdma_fw) are new.
Change-Id: I4661667966e26f52e6c5142f1947d2a34b7008ef
On the bootloader there's no point reserving memory for these,
the only users of codecbuf/pluginbuf are in the apps/ tree.
Change-Id: Ib57b4d59aff8f4dcc753d7993956ed15e61cdc52
Using the audio buffer directly is a bad idea because this will
render core_alloc non-functional if load_firmware() writes into
the buffer but then fails, for example on a checksum mismatch.
Change-Id: Ib2d17bcea53bdea1c4c5496cec0c4eee5dd66069
Document what the symbols are supposed to mean, fixup SPL's
usage of DRAM_END which should really be SDRAM_END instead.
No functional changes.
Change-Id: Ie85b0ee35fea8b7858891e5b9d6634eaae42c9f8
The implementation of write_bootdata() and get_redirect_dir() was
copied verbatim in two different places, obviously a bad thing for
maintainability. This moves them to a new file multiboot.c as they
are only used for multiboot.
Change-Id: Id0279216e4dd019f8bf612a81d3835eff010e506
This looks like it was copy-pasted blindly from elsewhere and it
wouldn't even compile, since hosted RoLo is completely different
from native RoLo.
Change-Id: I4074f5323dcbdae85db8a04f222c858e9a228432
