Based on g#844 and g#949, it is intended as a replacement for the
current s3c6400x USB driver.
The DesignWare USB OTG core is integrated into many SoC's, however
HW core version and capabilities (mainly DMA mode, Tx FIFO mode,
FIFO size and number of available IN/OUT endpoins) may differ:
CPU targets HW ver DMA NPTX FIFO FIFO sz #IN/OUT
-------- ------------- ------ --- --------- ------- -------
as3525v2 sansaclipplus 2.60a Yes Dedicated 0x535 4/4
sansaclipv2
sansaclipzip
sansafuzev2
s5l8701 ipodnano2g 2.20a Yes Shared 0x500 4/5
s5l8702 ipod6g 2.60a Yes Dedicated 0x820 7/7
ipodnano3g
s5l8720 ipodnano4g ? ? ? ? ?
Functionality supported by this driver:
- Device mode, compatible with USB 1.1/2.0 hosts.
- Shared FIFO (USB_DW_SHARED_FIFO) or dedicated FIFOs.
- No DMA (USB_DW_ARCH_SLAVE) or internal DMA mode.
- Concurrent transfers: control, bulk (usb_storage, usb_serial) and
interrupt (usb_hid).
Actually this driver is not used by any CPU, it will be enabled for
each individual CPU/target in next patches.
Change-Id: I74a1e836d18927a31f6977d71115fb442477dd5f
Apparently I simply forgot to calibrate it when the port was done and the
current values are just plain wrong, especially for the charging curve.
Change-Id: Ied3cafa52f31f182f953714e28edc4c5e891255f
There are two very suspicious things in the power off code:
- it does not properly unlock the power register, so it should fail (!)
- it does not disable sw/hw watchdog so if register fails, the device will
most probably crash horribly because of the watchdog
I don't even understand how it worked before.
Change-Id: I9f3f94bd012e52c3b50cd5b658d68b5eb907f79b
The old driver was bad in many respect, it had some race conditions, it was
using a thread to serialize transfers because of the legacy i2c interface.
It also had huge latency (typically 50ms but delays up to 300ms can happen),
thus some presses were missed.
The new driver takes advantage of the new i2c driver to do everything
asynchronously. It also does not need a thread anymore because queueing
ensures proper serialization. It provides much better and reliable latency
(typically ~2ms).
Also fix the debug screen which was horribly broken. The new screen also
displays the deadzones.
Change-Id: I69b7f99b75053e6b1d3d56beb4453c004fd2076e
The new driver provides several new features:
- asynchronous transfer
- transactions (several transfers executed at once)
- queueing
The style still provides the legacy interface.
Change-Id: I6d8ecc89d1f7057847c9b2dc69b76cd45c9c8407
Always enable support for SET_BLOCK_COUNT on mmc: it is mandatory. For some
reason (probably a mistake) it was disabled unconditionaly on mmc.
Also deselect sd card after init. Although it is unlikely to make a difference,
it is already done for mmc so stay consistent.
Change-Id: I276f0d95f5bb6a0bf431c2fff4589d3dfb15f8c7
The screen currently displays for each device the bus width, set_block_count
support, HS capability and whether it is enabled for not.
Change-Id: I6b1c3b1019e55ef1097a23c1f54fb07f5c7aa3b0
Some players like the ZEN X-Fi have a wide but not tall screen, it is
thus better to display everything on one line for each button
Change-Id: Ided3d4ff689cc5d3bcc2bdba4c7e046cf7dc0954
This screen allows to put the device in a special mode where:
- charging is disabled
- device only draws power from 5V (thus battery is untouched)
This is useful to measure the device consumption by measuring directly
the usb power consumption.
Change-Id: I2716ced0a5bb33c3c9a2607f2d17a0ce02f5689c
Per Freescale recommandation, we need to ramp up the 4.2V rail before enabling
charging. Ramping should be done at 1 step/10ms, but the old code did 1 step/1s
because the powermgmt_step() function is called once every second. Use a tick
task to ramp up much faster.
Change-Id: I9a52bdd0c2ba5426d83ed42db8db7ecce2fea1f7
The old code used button_get() to read the button status and wait for a
key to leave the panic screen. This is broken since when IRQ are disable,
the button mask is not updated anymore for touchpad and adc buttons. For
now, only use pswitch: this should be good enough for all targets.
Change-Id: I0ae179e24555ac20c3d2bf2d267c1bb0e2ceded0
The old timrot setup API was very low-level and unfriendly. The new one
makes in easier to select the frequency source. Use to simplify timer
and kernel timer code.
Change-Id: Iffcdf11c00e925be9ec8d9a4efc74b197b6bd2aa
The adc channel monitored for jack detection does not really have a fixed
value when plugged. Instead use the same logic as the OF and simply use a
threshold.
Change-Id: I1d5270d83eb14decce29a39d8201ea1d1fb4436c
For some reason those targets have quite imprecise button voltages and the
old margin was too small. This should fix the button-not-working issue,
especially when the player is very hot and cold.
Change-Id: I9fcddd7f079cd1c4ee121567fb21a4a0cbc0562b
The current driver is limited to checking if the adc value equals another
one with a hardcoded margin. This commit changes two aspects of that:
- the margin can be changed globally using IMX233_BUTTON_LRADC_MARGIN
and can also be overriden per button using the new LRADC_EX macro
- the lradc logic gained two comparison modes to check if the source
value is greater (or lower) than a threshold.
Change-Id: If1614451dafeae818a96e6f23a84e6731331ba03
Shorten some text to make the text readable in the debug screen of
targets with small LCD (like NWZ-380). In some screens, the only
option is to display less information.
Change-Id: I78f8f35f7c507de19e5d27a918157504155f2ba6
The power management code was erroneously shuting down the 4.2V rail
when charging is complete. This resulted in the DCDC draining the battery
and thus the battery discharging with USB plugged...
The new code keeps the 4.2V rail active so that battery remains untouched
once charge is complete.
Change-Id: I36e8d31e8115c12ce813c939c5d7bbf2c3490157
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
- Speed auto detection is launched when an accessory is inserted,
so the user doesn't need to modify settings to use accessories
that operates at different speeds (or when the same accessory is
unplugged and plugged again).
- UART controller is disabled when no accessory is inserted, not
much powersave but everything counts.
Change-Id: If20c3617c2a87b6277fd7e0270031030c44fa953
This change ensures that Sansa Connect bootloader.bin will fit in its flash
partition.
Fix _flash_sizem calculation, division was not working properly because
FLASHSIZE included subtraction and defined value was not in parenthesis.
Prior to this change _flash_sizem was 0x00800000, now it is correctly set
to 4 in case of Sansa Connect and 8 in case of other TMS320DM320 players.
This significantly improves boot time as cache is now enabled only for
real flash memory region.
Change-Id: If3e50a3075c840dcb69dfafe5bba608a0acd2bf8
PMU interrupts are used to detect USB Vbus, wall adaptor, accessories
and holdswitch. A thread is needed to poll the PMU throught I2C, ATM
it does nothing but showing the state of the inputs on the HW debug
menu, funcionallity for each individual input will be added in next
patches.
Change-Id: If93bf2044d1052729237a7fd1431c8493e09f1c7
Do not rely on a bootloader initializing the HW, RB initializes
and configures GPIO, I2C, and PMU at startup.
Change-Id: If7f856b1f345f63de584aa4e4fc22d130cd66c80
Low level functions that do not depend on Rockbox kernel,
intended to be used by the bootloader, dualboot-installer,
RB drivers or other .dfu tools.
Change-Id: If80214d26e505265ace19d9704f1e1300f98b2f4
When the bootloader starts, most of HW never has been initialized.
This patch includes all code needed to perform the preliminary
initialization on SYSCON, GPIO, i2c, and MIU.
The code is based on emCORE and OF reverse engineering, ported to
C for readability.
Change-Id: I9ecf2c3e8b1b636241a211dbba8735137accd05c
This patch optimizes UDMA timings to increase write transfer rate on
ATA bus, these transfers are clocked by HCLK, tDVS+tDVH is modified to
decrease Tcyctyp (typical write cycle period). This is not overclocking,
we meet the ATA standar, the settings used by OF are not well optimized
for each UDMA mode, we will never know but probably this was due some
documentation issue.
ATA_UDMA_TIME register is documented on s3c6400 datasheet, information
included in s5l8700 datasheet is wrong or not valid for s5l8702.
From ATA specs, (Minimum, Maximum) values in nanoseconds:
UDMA 0 UDMA 1 UDMA 2 UDMA 3 UDMA 4
tACKENV (20, 70) (20, 70) (20, 70) (20, 55) (20, 55)
tRP (160, --) (125, --) (100, --) (100, --) (100, --)
tSS (50, --) (50, --) (50, --) (50, --) (50, --)
tDVS (70, --) (48, --) (31, --) (20, --) (6.7, --)
tDVH (6.2, --) (6.2, --) (6.2, --) (6.2, --) (6.2, --)
tDVS+tDVH (120, --) (80, --) (60, --) (45, --) (30, --)
Tcyc = tDVS+tDVH
WR[bytes/s] = 1/Tcyc[s] * 2[bytes]
On Classic (boosted):
HClk = 108 MHz. -> T = ~9.26 ns.
Old values (used by OF):
UDMA ATA_UDMA_TIME tACK tRP tSS tDVS tDVH Tcyc WR(MB/s)
0 0x5071152 27.8 166.7 55.6 74.1 55.6 129.7 15.4
1 0x3050a52 27.8 101.8 55.6 55.6 37 92.6 21.6
2 0x3030a52 27.8 101.8 55.6 37 37 74 27
3 0x2020a52 27.8 101.8 55.6 27.8 27.8 55.6 36
4 0x2010a52 27.8 101.8 55.6 18.5 27.8 46.3 43.2
New values:
UDMA ATA_UDMA_TIME tACK tRP tSS tDVS tDVH Tcyc WR(MB/s)
0 0x4071152 27.8 166.7 55.6 74.1 46.3 120.4 16.6
1 0x2050d52 27.8 129.6 55.6 55.6 27.8 83.4 24
2 0x2030a52 27.8 101.8 55.6 37 27.8 64.8 30.9
3 0x1020a52 27.8 101.8 55.6 27.8 18.5 46.3 43.2
4 0x1010a52 27.8 101.8 55.6 18.5 18.5 37 54
To verify that the settings are correct, a write-to-cache test was
performed using emCORE, the measured transfer rate (WRm) is compared
against the theoric transfer rate (WR) at 108 Mhz for the old and
the new UDMA4 settings (iPod 160, HDD Toshiba MK1634GAL):
UDMA ATA_UDMA_TIME Tcyc(ns) WR(MB/s) WRm(MB/s) RDm(MB/s)
4 0x2010a52 46.3 43.2 42.9 59.8
4 0x1010a52 37 54 53.5 59.8
Notes:
- The new UDMA4 settings increases ~25% the ATA transfer rate for
cached-writes. The real HDD write speed is limited by the internal
transfer rate (depends on cilinder, for the MK1634GAL it is 276 to
573 Mbits/s). Sequential write benchmark using diskdump on USB are
~8% faster.
- Read transfers are clocked by the device, it depends on UDMA mode
selected and are not affected by HClk or ATA_UDMA_TIME settings.
Read-from-cache tests results (RDm) using HClk=108 and HClk=54 for
UDMA4 are 59.8 MB/s on MK1634GAL.
- Minimum HClk is limited by tACKENV specs, using current settings
it is 54 MHz for UDMA4,UDMA3 and 43 MHz for UDMA2,UDMA1,UDMA0.
Change-Id: I61d67060410752518a59e1ff08072b21747ca997
When the bootloader starts only IRAM is available, the first task is to
ask the PMU to verify if the iPod has previously been hibernated by OF.
Due to memory limitations, the kernel cannot be used on this stage.
This patch modifies I2C and PMU low level functions to not to depend
on kernel (removes mutexes, and uses HW timer instead of current_tick),
actual kernel functions are modified to be 'mutexed' wrappers of the new
functions.
Change-Id: I7cef9e95dedaf176dc0659315f3dc33166d5b116
Add UART support for s5l8700/1 using the UC870X UART controller,
actually the functionallity is disabled and must be enabled for
each individual target. Tested on iPod Nano 2G (s5l8701), not
tested on s5l8700.
Change-Id: Ic0f216bb871502d355a70e4b658e536a2c0976a9
- Small rework on the UC8702 UART controller to make it compatible with
other s5l870x SOCs. Files moved and renamed, many conditional code
added to deal with capabilities and 'features' of the different CPUs.
- A couple of optimizacions that should not affect the functionality.
Change-Id: I705169f7e8b18d5d1da642f81ffc31c4089780a6
Interrupts version is cause of freeze on USB extraction.
Also non-interrupts version much simpler and faster.
Change-Id: I30a2993cdcaa85abfba77ca06bfacd5b6b4353e2
Voltage is reduced when the CPU is unboosted, resulting in a large
reduction in power consumption. In analogy with the AMSv1 voltage
scaling code (currently disabled due to problems with SD cards),
I have defined a config file option to enable/disable it.
Change-Id: Ia89c31ec06dd012354b4d53435e7b5b36243b206
We need additional delay since ascodec_write_pmu() working faster in
non-interrupts version of I2C2.
Change-Id: If4af3e42b3c8e8214baa36e54353b8adb527552d
After setting new PCLK (96 Mhz) we have too high DBOP (96 / 16 = 6 MHz).
According to datasheet DBOP should be maximum 4 MHz.
Change-Id: I1cbec054f41a76a6f18eadccb902c5b174ad6e3a
We should check sd_wait_for_tran_state() after transfering to prevent data
timeout error. Also we should disable DMA channel manually.
Should be used with g#1270, without it freezes still can occur on data
transfering.
Change-Id: If8c6e5547ab14d66237bccf65f83affc7a346e5e
With current setting we spend few minutes for reading one sector if we have
data timeout error. With new setting system (linux) show error after ~10 seconds.
Change-Id: Id3922acb2ea146c6ea2f89f26206df9488e6ee4e
This should allow FireWire charging to work on these devices.
It also adds charging state detection on the iPod Classic.
(cherry picked from commit fa86fec4fb)
On Classic (and probably Nano 2G), it seems that the 100/500mA limit
applies only to USB chargers, when FW is connected it supplies all the
power (even if USB is also connected) and USB current limit does not
affect to FW charging, therefore the limit is only set when USB is
connected.
Change-Id: I7c6bab1b6a0f295367999c45faeda6085c3fb091
Signed-off-by: Cástor Muñoz <cmvidal@gmail.com>
Read/write buffers who are aligned to 16 were not re-aligned to 32 as
it should be. Althrough USB storage and buffering are always passing
buffers aligned to 32, a few unaligned buffers are being received from
other tasks, so this patch could solve some rare random issues.
Also fixes DMA configuration for HDDs that support any MDMA mode but
only UDMA0 (probably will never happen).
Change-Id: I00219ae434205681c69293fc563e0526224c9adf
- Add description for attributes supported by Samsung HS081HA (80Gb)
and HS161JQ (CEATA 160Gb).
- Show error code when ata_read_smart() fails.
Change-Id: I618cc4f37d139fc90f596e2cf3a751346b27deb6
Align USB_DEVBSS buffers to 32 (as other USB drivers are doing), this
could solve rare random memory corruption issues on iPod Classic.
Change-Id: I86a28e10415eabedab7bf4a534530900284f81e5
Reverts commit ead38dbc9d
It was introduced as a temporal workaround to avoid the endless restart
loop when battery is low, but really it is useless. The bootloader should
ensure that there is enough power to launch Rockbox even in the worst
scenario.
Change-Id: Iabebed40c9241af915c16c3c6c4d3c6deef7680e
seems more logical to me, and is more consistent, since
"SAMSUNG_YH92X_PAD" is already used in the tex files.
Change-Id: Ie9a9d850ea86155a7dcf86c88a22a420a10a3837
Voltage scaling is not yet enabled, but will follow once we are sure
these changes are stable. Preliminary testing suggests a large
increase in battery life, which will be further improved by voltage
scaling. Patch by Mihail Zenkov with help from myself and others on
the forums.
Change-Id: I171d20bbee19a48c13cd14efb0d023883cc8c687
Configures uncached memory region and adds some defines for misc HW,
for compability with the bootloader and other future use, current
functionality should not be affected.
Change-Id: I390e79bea1aef5b10dfbc72ad327d7fe438ec6f5
Uses GPIO.E2 (Request To Send) to detect the holdswitch status,
it is a temporal workaround that seems to work on all models.
Holdswitch status must be detected to drive low GPIO.E2 (RTS)
and GPIO.E4 (Data Out) when the holdswitch is locked, otherwise
battery life decreases about 25%.
Holdswitch unlock action is detected by reading the HELLO message
that the external wheel controller sends when it is powered on,
this allows to quickly capture clickwheel activity after unlock.
GPIO.E2 is also used in case the HELLO message is missed because
the holdswitch was unlocked before Rockbox/bootloader starts.
These 2 lines (RTS and DOUT) can not be used to transmit messages
to the external clickwheel controller, not a problem, actually no
messages are sent while normal operation, only at initialization
stage.
Change-Id: I415fe54bfcbc2086d0f56d7affe6f789ce81a6db
This is a rewrite of the clocking section, the resulting system
frequencies are the same as the current git version.
This pàtch uses fixed FClk and just one register is written to switch
all system frequencies, it needs less steps than the current git
version to reach the desired frequency, so it is faster and safer.
Includes functions to step-up/down over a table of predefined set of
frequencies.
The major difference is that Vcore is decreased from 1050 to 1000 mV.
See clocking-s5l8702.h for more information.
Change-Id: I58ac6634e1996adbe1c0c0918a7ce94ad1917d8e
The main "innovation" in this patch are two "virtual buttons"
for the record switch on YH92x targets. When the switch state
changes, a single BUTTON_REC_SW_ON or .._OFF button event will
be generated. Thus keymap code can react on switching, but
not on the actual state of the switch.
Wherever sensible, the following user scheme is applied:
- use PLAY as confirm button
- use REW button or Long REW to exit
- use REC (YH820) or FFWD (YH92X) as modifier key for button combos
Change-Id: Ic8d1db9cc6869daed8dda98990dfdf7f6fd5d5a1
Adds ata_read_smart() function to storage ATA driver, current
SMART data can be displayed and optionally written to hard
disk using System->Debug menu.
Change-Id: Ie8817bb311d5d956df2f0fbfaf554e2d53e89a93
This patch limits the drawn USB current to 100/500mA, instead of
the actual 200/1000mA settings. It also initializes other USB power
related GPIOs.
Solves some USB disconnect issues: FS#12990, FS#12956. I am using a
powered USB HUB with no problems (Vusb=5.05V unloaded), but there
are lots of USB disconnects when using the motherboard USB ports
(Vusb=4.91V), this patch solves all my issues.
Actually, it seems that the USB current drain is limited to 1000mA,
when a load peak occurs most USB2 ports deliver more than 500mA, as
current consumption increases the USB voltage decreases, an excesive
voltage drop produces USB disconnections. Limiting USB current drain
to 500mA also limits the voltage drop, preventing subsequent USB
failures.
Anyway, to minimize voltage drop, it is recommended to use quality
cables and preferably connect to USB ports with higher Vusb.
Change-Id: I1b931aa18ec93bfd1214e475a72e42893eff52f6
- polling/IRQ modes for Tx/Rx (TODO?: DMA)
- fine adjust for Tx/Rx bitrates
- auto bauding using HW circuitry
- status and stats in debug screen
Change-Id: I8650957063bc6d274d92eba2779d93ae73453fb6
This patch has been tested on iPod 80 and 160slim, actually
it works but some updates must be done to the final version:
- unlimitted input buffer
- decrease CHUNK_SIZE
- use non-cached addresses instead of discard d-cache ???
Capture hardware versions:
Ver iPod models capture support
--- ----------- ---------------
0 80/160fat dock line-in
1 120/160slim dock line-in + jack mic
HW version 1 includes an amplifier for the jack plug mic.
Capture HW detection only tested on iPod 80 and 160slim.
CODEC power:
AFAIK, OF powers CS42L55 at VA=2.4V for capture (1.8V for
playback) and turns on the ADC charge pump. CODEC datasheet
recommmends to disable the charge pump for VA>2.1V.
CS42L55 DS, s4.13 (Required Initialization Settings): for
VA>2.1V, some adjustments "must" be done using undocummented
"control port compensation" registers. OF does not modifies
these registers when VA=2.4V.
This patch configures capture HW in the same way as OF does.
TODO:
- ADC full scale voltage depends on VA, perform tests to find
clipping levels for VA=1.8V and VA=2.4V
Change-Id: I7e20fd3ecaa83b1c58d5c746f5153fe5c3891d75
This patch uses the new pl080 DMA driver for I2S playback and LCD
update. I have tried to be as fiel as possible to the current
behaviour, algorithms and configurations are the same, but using
the new driver. Other modifications:
Playback:
- CHUNK_SIZE is decreased from 42988 to 8188 bytes, it does not
affect normal playback (block size 1024), was tested using
metronome (block size 46080). This change is needed because the
new code commits d-cache range instead of commiting the whole
d-cache, maximum time spent commiting the range should be
limited, CHUNK_SIZE can be decreased even more if necessary.
- pcm_play_dma_start() calls pcm_play_dma_stop() to stop the
channel when it is running (metronome replays the tick sound
without stopping the channel).
- pcm_play_dma_get_peak_buffer(): same as actual SVN function but
returns samples count instead of bytes count.
TODO: AFAIK, actually this function is not used in RB. Not tested,
but probably this function will fail because it returns pointers
to the internal double buffer.
LCD update:
- suppresses lcd_wakeup semaphore and uses yield()
Change-Id: I79b8aa47a941e0dd91847150618f3f7f676c26ef
Motivation:
This driver began as a set of functions to help to test and
experiment with different DMA configurations. It is cumbersome,
time consuming, and leads to mistakes to handle LLIs and DMA
registers dispersed along the code.
Later, i decided to adapt an old DMA queue driver written in the
past for a similar (scatter-gather) controller, all task/queue
code is based on the old driver.
Finally, some cleaning and dmac_ch_get_info() function was added
to complete RB needs.
Description:
- Generic, can be used by other targets including the same
controller. Not difficult to adapt for other similar
controllers if necesary.
- Easy to experiment and compare results using different
setups and/or queue algorithms:
Multi-controller and fully configurable from an unique place.
All task and LLI management is done by the driver, user only
has to (statically) allocate them.
- Two queue modes:
QUEUE_NORMAL: each task in the queue is launched using a new
DMA transfer once previous task is finished.
QUEUE_LINK: when a task is queued, it is linked with the last
queued task, creating a single continuous DMA transfer. New
tasks must be queued while the channel is running, otherwise
the continuous DMA transfer will be broken.
On Classic, QUEUE_LINK mode is needed for I2S continuous
transfers, QUEUE_NORMAL is used for LCD and could be useful
in the future for I2C or UART (non-blocking serial debug) if
necessary.
- Robust DMA transfer progress info (peak meter), needs final
testing, see below.
Technical details about DMA progress:
There are comments in the code related to the method actually
used (sequence method), it reads progress without halting the
DMA transfer. Althought the datasheet does not recommend to do
that, the sequence method seems to be robust, I ran tests calling
dmac_ch_get_info() millions of times and the results were always
as expected (tests done at 2:1 CPU/AHB clock ratio, no other
ratios were tried but probably sequence method will work for any
typical ratio).
This controller allows to halt the transfer and drain the DMAC
FIFO, DMA requests are ignored when the DMA channel is halted.
This method is not suitable for playback because FIFO is never
drained to I2S peripheral (who raises the DMA requests). This
method probably works for capture, the FIFO is drained to memory
before halting.
Another way is to disable (stop) the playback channel. When the
channel is disabled, all FIFO data is lost. It is unknown how much
the FIFO was filled when it was cleared, SRCADDR counter includes
the lost data, therefore the only useful information is LINK and
COUNT, that is the same information disponible when using the
sequence method. At this point we must procced in the same way as
in sequence method, in addition the playback channel should be
relaunched (configure + start) after calculating real SRCADDR.
The stop+relaunch method should work, it is a bit complicated,
and not valid for all peripheral FIFO configurations (depending
on stream rate). Moreover, due to the way the COUNT register is
implemented in HW, I suspect that this method will fail when
source and destination bus widths doesn't match. And more
important, it is not easy to garantize that no sample is lost
here or there, using the sequence method we can always be sure
that playback is ok.
Change-Id: Ib12a1e2992e2b6da4fc68431128c793a21b4b540
This patch implements a simple API to use the external interrupt
hardware present on s5l8702 (GPIO interrupt controller). This
GPIOIC has been fully tested using emcore apps.
Code is based on openiBoot project, there are a few modifications
to optimize space considering we will only use two or three external
interrupts. The API compiles and works, but has been never used,
therefore probably will need some changes to the final version.
External interrupts are necessary for jack remote+mic controller
(see iAP Interface Specifiction: Headphone Remote and Mic System),
this controller is located at I2C bus address 0x72, there is a IRQ
line for remote button press/release events routed to GPIO E6. At
this moment, the functionallity of this controller has been
extensively tested using emcore, getting a lot of information about
how it works. Microphone is already working on RB, jack accessory
detection and button events are work in progress.
PMU IRQ line is also routed to GPIO F3, it signals many events:
holdswitch, usb plug, wall adapter, low battery... The use of PMU
interrupts is the orthodox way of doing things, at this moment
there is no work done in this direction, there are a lot of PMU
events and i think it is a matter of discursion what to do and how.
Change-Id: Icc2e48965e664ca56c9518d84a81c9d9fdd31736
It was possible for interrupts of higher priority than the current IRQ
level to attempt to restart the interface while it was still active on
a transfer. The list modification also wasn't protected within the I2C
ISR itself.
Change-Id: I70635c307a1443bba6801c588cf1efde299db9a4
Except for unfinished or experimental ports, it isthe case that
USE_ROCKBOX_USB and HAVE_USBSTACK are both defined or both undefined.
Furthermore, it is a leftover of some early developments on the USB stack and
doesn't make sense anymore.
Change-Id: Ic87a865b6bb4c7c9a8d45d1f0bb0f2fb536b8cad
Reviewed-on: http://gerrit.rockbox.org/1091
Reviewed-by: Amaury Pouly <amaury.pouly@gmail.com>
The backlight driver always writes a bogus value
from memory into the LCD brightness register.
Fix it up by adding bounds checks and
use a more sane default value.
While looking at the code, I noticed
that BACKLIGHT_CONTROL_SET probably ignores
the desired brightness level, too.
Note: Please test on real hardware, I don't own it.
cppcheck reported:
[rockbox/firmware/target/arm/s3c2440/mini2440/backlight-mini2440.c:53]: (error) Array 'log_brightness[13]' accessed at index 255, which is out of bounds.
Change-Id: Iaafa929a8adaa97b93ebcb66e1f6bd3bf0dad84e
While the right GPIO location is accessed,
the result of the logical AND was tested wrong.
I don't have this hardware, but I can imagine
that bug caused ide_power_enable() to be called
more times than it needed to be.
cppcheck reported:
[rockbox/firmware/target/arm/pbell/vibe500/power-vibe500.c:101]: (style) Expression '(X & 0x8) == 0x1' is always false.
Change-Id: I98498f79d383c6f29869e170bfc94ba9a0d2ba7e
Optimizes YUV to RGB conversion using ARMv5 multiply-accumulate
intructions for operations and data tables for saturation.
This first patch set includes the three versions i have developed.
Although iPod Classic need to use the latest version to reach 30fps,
old versions may serve other targets.
All versions are based on current SVN algorithm (round->scale->add)
using the same coefficients, so output results are identical.
Version history:
ARMv4:
- use all available registers to calculate four pixels within each
loop iteration.
- avoid LDR interlocks.
ARMv5TE:
- use ARMv5TE+ 1-cycle multiply-accumulate instructions.
ARMv5TE_WST:
- use data tables (256 bytes) for RBG565 saturation.
Benchmarks results using iPod Classic (ARM926EJ 216Mhz):
size test_fps (1) mpegplayer (2)
bytes YUV YUV1/4 average min/max
----- ----------- ------------------
SVN-20141107 528 27.8 110.0 11035 10864/13397
ARMv4 480 28.8 114.0 9767 9586/12126
ARMv5TE 468 29.7 117.5 8751 8584/11118
ARMv5TE_WST 544 33.6 133.0 6355 6316/6403
(1) boosted
(2) play full elephants_dream_320x240.mpg file (15693 frames) using
mpegplayer, patched RB measures YUV to RGB565 frame conversion
time (microseconds)
Compared against the WST version, the ARMV5TE version w/o cached
saturation tables is slower, but it is smaller and i have doubts
about the power consumption.
Change-Id: I2b6a81804636658d85a1bb104ccb2055e77ac120
Reviewed-on: http://gerrit.rockbox.org/1034
Reviewed-by: Cástor Muñoz <cmvidal@gmail.com>
Tested: Cástor Muñoz <cmvidal@gmail.com>
Commit 7d1a47cf ("Rewrite filesystem code (WIP)") exposed
bug in rk27xx sd driver. Buffer passed to sd_read/write_sectors()
doesn't has to be cacheline aligned. DMA transfers on
unaligned buffers is quiet dangerous thing.
Make sure that the buffer is aligned to cacheline size,
If not use a temporary aligned buffer for DMA transfer.
Change-Id: I91420f2b8d58159c80c3f15f4b35e88ea0dfd14c
Use 32 bytes for cache line length (arm926ej-s), this prevents
misalignments of ATA storage buffer which in some builds could
cause weird faults.
Change-Id: I88dc595d251315620ec49b0251ddc039ff47181e
Reviewed-on: http://gerrit.rockbox.org/1031
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
This restores functionality that was broken in g#194 and committed as
revision 7ec426e497.
Bidirectional communication is required to ask the clickwheel controller
for the initial button state during boot. Otherwise our driver would only
know about pressed buttons when the first change event is received,
which is too late for e.g. prevention of USB connection during boot.
This fix is also required to support the selection of OF, Rockbox,
Disk Mode, etc. in the iPod Classic Rockbox bootloader.
Change-Id: I127d54cf9e630d8075dd6d66f95dacb2816bfbc8
Reviewed-on: http://gerrit.rockbox.org/938
Reviewed-by: Michael Sparmann <theseven@gmx.net>
Tested: Michael Sparmann <theseven@gmx.net>
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
Patch by Mihail Zenkov who measured a modest increase in power consumption with
the current sink enabled.
Change-Id: Ib1c1639318de35d449ca51a9bd480005cb6a2ee0
Reviewed-on: http://gerrit.rockbox.org/989
Reviewed-by: Michael Giacomelli <giac2000@hotmail.com>
Tested: Michael Giacomelli <giac2000@hotmail.com>
measured several milliamps power reduction from having the PHY disabled.
Change-Id: I29e55222eb50acf2023ac1113a90612029c580af
Reviewed-on: http://gerrit.rockbox.org/988
Reviewed-by: Michael Giacomelli <giac2000@hotmail.com>
Tested: Michael Giacomelli <giac2000@hotmail.com>
This improves compatibility with various HDD and CF/SD card mods.
It should also reduce power consumption while the drive is powered down.
Change-Id: I4b22c59b5d9ae2daea2ec5892e348e7e1934ca3e
Reviewed-on: http://gerrit.rockbox.org/897
Tested: Franklin Wei <frankhwei536@gmail.com>
Tested: Nial Shui <nialv7@gmail.com>
Tested: Michael Sparmann <theseven@gmx.net>
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
To stop erroneous button presses, allow users to add a deadzone between
the button via the Settings > General > System menu > Touch Dead Zone.
The configuration was chosen this way: the touchpad has the same DPI
in both direction so the setting applies the same on both the X and Y
axis. The setting ranges from 0 to 100 and is internally multiplied by 2
giving a maximum deadzone of 2*100 = 200 around each button, which
account for 400 total (once around each button), effectively reducing
each virtual button from 1000x600 to 600x200 when using the maximum value.
Change-Id: I8683c63d2950200eb32d1dda0a00bbd92d83d5be
Reviewed-on: http://gerrit.rockbox.org/677
Reviewed-by: Benjamin Brown <foolshperson@gmail.com>
Tested: Benjamin Brown <foolshperson@gmail.com>
Reviewed-by: Amaury Pouly <amaury.pouly@gmail.com>
This patch redoes the filesystem code from the FAT driver up to the
clipboard code in onplay.c.
Not every aspect of this is finished therefore it is still "WIP". I
don't wish to do too much at once (haha!). What is left to do is get
dircache back in the sim and find an implementation for the dircache
indicies in the tagcache and playlist code or do something else that
has the same benefit. Leaving these out for now does not make anything
unusable. All the basics are done.
Phone app code should probably get vetted (and app path handling
just plain rewritten as environment expansions); the SDL app and
Android run well.
Main things addressed:
1) Thread safety: There is none right now in the trunk code. Most of
what currently works is luck when multiple threads are involved or
multiple descriptors to the same file are open.
2) POSIX compliance: Many of the functions behave nothing like their
counterparts on a host system. This leads to inconsistent code or very
different behavior from native to hosted. One huge offender was
rename(). Going point by point would fill a book.
3) Actual running RAM usage: Many targets will use less RAM and less
stack space (some more RAM because I upped the number of cache buffers
for large memory). There's very little memory lying fallow in rarely-used
areas (see 'Key core changes' below). Also, all targets may open the same
number of directory streams whereas before those with less than 8MB RAM
were limited to 8, not 12 implying those targets will save slightly
less.
4) Performance: The test_disk plugin shows markedly improved performance,
particularly in the area of (uncached) directory scanning, due partly to
more optimal directory reading and to a better sector cache algorithm.
Uncached times tend to be better while there is a bit of a slowdown in
dircache due to it being a bit heavier of an implementation. It's not
noticeable by a human as far as I can say.
Key core changes:
1) Files and directories share core code and data structures.
2) The filesystem code knows which descriptors refer to same file.
This ensures that changes from one stream are appropriately reflected
in every open descriptor for that file (fileobj_mgr.c).
3) File and directory cache buffers are borrowed from the main sector
cache. This means that when they are not in use by a file, they are not
wasted, but used for the cache. Most of the time, only a few of them
are needed. It also means that adding more file and directory handles
is less expensive. All one must do in ensure a large enough cache to
borrow from.
4) Relative path components are supported and the namespace is unified.
It does not support full relative paths to an implied current directory;
what is does support is use of "." and "..". Adding the former would
not be very difficult. The namespace is unified in the sense that
volumes may be specified several times along with relative parts, e.g.:
"/<0>/foo/../../<1>/bar" :<=> "/<1>/bar".
5) Stack usage is down due to sharing of data, static allocation and
less duplication of strings on the stack. This requires more
serialization than I would like but since the number of threads is
limited to a low number, the tradoff in favor of the stack seems
reasonable.
6) Separates and heirarchicalizes (sic) the SIM and APP filesystem
code. SIM path and volume handling is just like the target. Some
aspects of the APP file code get more straightforward (e.g. no path
hashing is needed).
Dircache:
Deserves its own section. Dircache is new but pays homage to the old.
The old one was not compatible and so it, since it got redone, does
all the stuff it always should have done such as:
1) It may be update and used at any time during the build process.
No longer has one to wait for it to finish building to do basic file
management (create, remove, rename, etc.).
2) It does not need to be either fully scanned or completely disabled;
it can be incomplete (i.e. overfilled, missing paths), still be
of benefit and be correct.
3) Handles mounting and dismounting of individual volumes which means
a full rebuild is not needed just because you pop a new SD card in the
slot. Now, because it reuses its freed entry data, may rebuild only
that volume.
4) Much more fundamental to the file code. When it is built, it is
the keeper of the master file list whether enabled or not ("disabled"
is just a state of the cache). Its must always to ready to be started
and bind all streams opened prior to being enabled.
5) Maintains any short filenames in OEM format which means that it does
not need to be rebuilt when changing the default codepage.
Miscellaneous Compatibility:
1) Update any other code that would otherwise not work such as the
hotswap mounting code in various card drivers.
2) File management: Clipboard needed updating because of the behavioral
changes. Still needs a little more work on some finer points.
3) Remove now-obsolete functionality such as the mutex's "no preempt"
flag (which was only for the prior FAT driver).
4) struct dirinfo uses time_t rather than raw FAT directory entry
time fields. I plan to follow up on genericizing everything there
(i.e. no FAT attributes).
5) unicode.c needed some redoing so that the file code does not try
try to load codepages during a scan, which is actually a problem with
the current code. The default codepage, if any is required, is now
kept in RAM separarately (bufalloced) from codepages specified to
iso_decode() (which must not be bufalloced because the conversion
may be done by playback threads).
Brings with it some additional reusable core code:
1) Revised file functions: Reusable code that does things such as
safe path concatenation and parsing without buffer limitations or
data duplication. Variants that copy or alter the input path may be
based off these.
To do:
1) Put dircache functionality back in the sim. Treating it internally
as a different kind of file system seems the best approach at this
time.
2) Restore use of dircache indexes in the playlist and database or
something effectively the same. Since the cache doesn't have to be
complete in order to be used, not getting a hit on the cache doesn't
unambiguously say if the path exists or not.
Change-Id: Ia30f3082a136253e3a0eae0784e3091d138915c8
Reviewed-on: http://gerrit.rockbox.org/566
Reviewed-by: Michael Sevakis <jethead71@rockbox.org>
Tested: Michael Sevakis <jethead71@rockbox.org>
Forgot to (void) an unused parameter when priorityless.
usb-drv-rl27xx.c was using a compound init to initialize a semaphore
but the structure changed so that it is no longer correct. Use
designated initializers to avoid having to complete all fields.
Forgot to break compatibility on all plugins and codecs since the
kernel objects are now different. Take care of that too and do the
sort thing.
Change-Id: Ie2ab8da152d40be0c69dc573ced8d697d94b0674
Abstracts threading from itself a bit, changes the way its queues are
handled and does type hiding for that as well.
Do alot here due to already required major brain surgery.
Threads may now be on a run queue and a wait queue simultaneously so
that the expired timer only has to wake the thread but not remove it
from the wait queue which simplifies the implicit wake handling.
List formats change for wait queues-- doubly-linked, not circular.
Timeout queue is now singly-linked. The run queue is still circular
as before.
Adds a better thread slot allocator that may keep the slot marked as
used regardless of the thread state. Assists in dumping special tasks
that switch_thread was tasked to perform (blocking tasks).
Deletes alot of code yet surprisingly, gets larger than expected.
Well, I'm not not minding that for the time being-- omlettes and break
a few eggs and all that.
Change-Id: I0834d7bb16b2aecb2f63b58886eeda6ae4f29d59
* HWCODEC bootloaders
* Remove references to thread structures outside the kernel. They are
private and should not be used elsewhere. The mrobe-100 is an offender
that gets squashed.
* The ata.c hack stuff for large sector disks on iPod Video gets squashed
for the same reason. I will no longer maintain it, period; please find
the real reason for its difficulties.
Change-Id: Iae1a675beac887754eb3cc59b560c941077523f5
* Seal away private thread and kernel definitions and declarations
into the internal headers in order to better hide internal structure.
* Add a thread-common.c file that keeps shared functions together.
List functions aren't messed with since that's about to be changed to
different ones.
* It is necessary to modify some ARM/PP stuff since GCC was complaining
about constant pool distance and I would rather not force dump it. Just
bl the cache calls in the startup and exit code and let it use veneers
if it must.
* Clean up redundant #includes in relevant areas and reorganize them.
* Expunge useless and dangerous stuff like remove_thread().
Change-Id: I6e22932fad61a9fac30fd1363c071074ee7ab382
Remote buttons are bound to the standard buttons in button-target.h, but they can
have a separate buttonmap, if someone wants.
Change-Id: Id8c78a3dfec0005bf588dc16416870b4c7c56836
OF doesn't do such thing. Values in mV are converted proportionally, so no change
to the battery meter.
Change-Id: Ic545b0514535e7f17f0379ed02f6bdf515f69ac6
The "percent_to_volt_charge" values are quite arbitrary
and may need some more tweaking.
Change-Id: I9f177d46681030d615fe2c2e78cf9bd2dde026af
Reviewed-on: http://gerrit.rockbox.org/824
Reviewed-by: Szymon Dziok <b0hoon@o2.pl>
Tested: Szymon Dziok <b0hoon@o2.pl>
This doesn't touch external tools as I see no need for.
Change-Id: Ia69248c4b6a033c3772916525257e3540bddcffa
Reviewed-on: http://gerrit.rockbox.org/891
Tested: Sebastian Leonhardt <sebastian.leonhardt@web.de>
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
crc32gentab() which initilizes crc table was called in bootloader
but not in main binary. Fix this temporary by always calling it in
load_mi4(). The proper fix probably to switch to const table and
drop runtime initialization.
Change-Id: I8b0c2c791642f56ed56189d156647661935a815d
Apparently the backlight driver is leaking current even when the PWM set to 0.
This patch should greatly improve the battery life of the device.
Change-Id: I76bbc8a87cae452e599b37de17e91f373cee58bc
On those targets, since the LCDIF cannot recover from underflow, changing the
EMI frequency kills one frame and cause flicker.
Change-Id: Id3c130636bcfddcc6c54896602699fbaa1636ab4
There is no simple method to detect radio through the 3-wire interface, so it's
not implemented for the YH-925 for now. YH-920 always has a radio.
Change-Id: Iea484d752915fcd40dbbbd7dbbf13e81aaf548db
Although both players basically have the same keys, the
differences in the layout is rather big, so I think both
deserve their own keymaps.
(On the yh820 the FFWD/PLAY/REW buttons are located above the
direction keys, on the yh920 at the side of the player.
Furthermore the yh920/925 has a REC switch, whereas
yh820 has a push button.)
Change-Id: I0e62a1b101c387646c0bdb07ea142d9d2430ca15
Reviewed-on: http://gerrit.rockbox.org/814
Reviewed-by: Szymon Dziok <b0hoon@o2.pl>
The lcd driver now works but is awfully slow. The trick is to put it in system
mode instead of RGB and setup 16bpp. The GRAM data can then be sent directly
with the SPI but since it's bit-banged and the CPU running at slow speed,
full screen refresh takes over a second, even with a slightly optmised version.
The OF uses a DMA mechanism with a proper LCD controller but the setup is much
more complicated and doesn't work at the moment.
Change-Id: I6c95d91de31bff97d0a5848b8e2078c21deb5895
The write buffer should not be modified but the current code does and then
forget to restore it to its original content. I'm not sure if any code relies
to the write buffer to not be modifies by the write function but this seems like
a reasonable assumption in general so it's better not to break it.
Change-Id: I449a01db2ec51d2273e59b69c59db0e7d2eed3db
This patch completes the plugin keymaps for the Zen X-Fi3 and enables those plugins for compilation.
One key was changed in "button-target.h" for compatibility with Rockboy.
This also caused the changes to "keymap-zenxfi3.c", to keep the stock functionality (no further changes in here).
Change-Id: Ic222faf89e9a9a2332a49d6e532cedb6eb16d3d7
Reviewed-on: http://gerrit.rockbox.org/762
Reviewed-by: Amaury Pouly <amaury.pouly@gmail.com>
Apart from the fact that the original settings were much
to sensitive for my taste, they are now easier configurable.
Change-Id: If1772367fc1f34fa1255f57b1831d1f33dc34558
Reviewed-on: http://gerrit.rockbox.org/772
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
For some reason the power subsystem needs to know the relationship between
the VDD{D,A,IO} and uses a weird register to do so.
Change-Id: I7fcc75f6cc0460b4997914986deda7ca544a4940
Contrary to the imx233, the stmp37xx lcdif doesn't know how to properly
recover from underflow and things are worse because of the errata which
makes the lcdif not clear the fifo. Workaround this by detecting underflow
and taking action: stop dotclk mode (will clear fifo) and schedule next frame.
The dma transfers now write the ctrl register as part of the PIO writes,
making the code simpler.
Change-Id: I15abc24567f322cd03bf2ef7903094f7f0178427
Implement scanning as binary tree in array.
Make the ADC calls fewer without compromising read quality.
Declare the thread function as 'noreturn' to save some stack. Reduce
stack size (regardless, % use is now a bit lower).
Change-Id: I239792fd2a0a2c019d1ec4af1d6d4b466cdf0ef5
No code changed, just shuffling stuff around. This should make it easier to
build only select parts kernel and use different implementations.
Change-Id: Ie1f00f93008833ce38419d760afd70062c5e22b5
This driver will subsume the old button-lradc driver and support far more
options. It can sense LRADC channels, PSWITCH, GPIOs and it handles special
"buttons" like headphone insertion and hold detection. It also provides a
more natural description of the buttons using a target-defined table with some
macros to make it easy to read and write. It uniformely handles debouncing on
LRADC channels and PSWITCH.
Change-Id: Ie61d1f593fdcf3bd456ba1d53a1fd784286834ce
On some OSes like Windows or if running in a virtual machine, the one second
timeout might be too short.
Change-Id: I717f7a2aaed1cb3d40e8fbe6f9b1081b43ceea95
Original fix by Marcin: it had a problem because crt0 on imx233 is more
complicated than many targets: since we use virtual memory, we first disable
the MMU, then move the entire image (including init and itext stuff), then
setup a temporary stack to setup the MMU. Only when the MMU is enabled, can
we move the init and itext stuff to its right location and finally boot.
This requires some trickery because:
- the initial move copies everything, including init and itext
- the stack overlaps with init and itext to reclaim space
- the temporary stack cannot be the same as the main stack to avoid trashing
the init and itext code, also it needs to be a physical address
Change-Id: Ibaf331c7d90b61f99225d93c9e621eb0f3f8f2dc
Rework the irq code, to put more code in the C part. When interrupt
nesting is enable, Rockbox gets pretty unstable so disable it for now.
Change-Id: Iee18b539c80ea408273f6082975faaa87d3ee1b6
Unfortunately the hardware is not very helpful when changing voltage: in DCDC
mode we have the DC_OK_IRQ but in linear regulator mode, the only available
bit doesn't work when lowering the voltages. At the moment, simply sleep for a
little while before a better solution is found.
Change-Id: I89335873e9e42e5c6e9131f40db7839b008c021c
The old could trigger an immediate IRQ if for example the count was 0
when setting up the timer: since the count was updared *after* clearing the
IRQ, it could fire in between.
Change-Id: I0357b201655bc0e56425ffb249ca807525f30217
zenxfi2: add support for internal storage on the SD version
The code can now skip devices marked as PROBE if they fail to init, thus
making it possible to handle various kinds of internal storages. The current
code probably doesn't interplay nicely since it acquires pins and never
release them so it will probably break NAND code when it's ready but NAND code
is not ready yet anyway.
Change-Id: I4cb962de4215661e521743a3f511445dbbf28673
The current code does hazardous tweaks to the power subsystem: indeed if one
boots with USB plugged and some stub powers on the DCDC switch, it will fail.
Indeed, a hardware bug prevents from going back to linear regulators (see
errata) so we cannot expect to reach a known state (linreg on, dcdc off)
on each configuration and in particular, powering down the 4p2 rail in
such a configuration will result in a power brownout.
This commit works around this issue by not touching the initial power
configuration until USB is (un)plugged, which are the best spots to get
known states.
Change-Id: I8741a3995df8ae61ca1c887a3ecb7903d0ac5136
In most devices, the button ladder is not actually derived from VDDIO but
from a constant voltage source, making it very easy to read it. However on
some devices like ther ZEN X-Fi Style, the ladder is wired to VDDIO we
can be changed so it's crucial that the button driver correctly scales the
values wrt VDDIO.
Change-Id: Ifc11abe2838fa7d16d0d60ecd96964a8dc5ea6d7
The hardware watchdog automatically shutdown the device after 10s of
inactivity, being defined as 10s without the tick IRQ fired (aka braindead
device).
The software IRQ mechanism is more interesting: it uses a very high priority
timer setup as one-shot to trigger after 5s of inactivity (but IRQ still
enabled). When detected, it patches the running code to insert a SWI
instruction so that on interrupt return it will trigger a SWI and produce
a meaningfull backtrace to debug the deadlock. This should allow to debug
freezes in IRQ context.
Change-Id: Ic55dad01201676bfb6dd79e78e535c6707cb88e6
Rewrite IRQ handling to allow nested IRQs: on each IRQ entry, we save the
parameters on the (IRQ) stack and then switch to SVC mode (with its own
stack) and renable interrupts. Make sure interrupt is properly acknowledged
by using the read side-effect (RSE) mode and handle priority levels as well.
Change-Id: I3fd68289b430c56bdd256868939238ff268e42b4
This fixes the radioart crash that was the result of buffering.c working
on a freed buffer at the same time as buflib (radioart uses buffering.c for the
images). With this change the buffer is owned by buflib exclusively so this
cannot happen.
As a result, audio_get_buffer() doesn't exist anymore. Callers should call
core_alloc_maximum() directly. This buffer needs to be protected as usual
against movement if necessary (previously it was not protected at all which
cased the radioart crash), To get most of it they can adjust the willingness of
the talk engine to give its buffer away (at the expense of disabling voice
interface) with the new talk_buffer_set_policy() function.
Change-Id: I52123012208d04967876a304451d634e2bef3a33
The port uses the imx233 soc, it's a STMP3650 based Samsung player
Change-Id: I50b6d7e77fd292fab5ed26de87853cd5aaf9eaa4
Reviewed-on: http://gerrit.rockbox.org/490
Reviewed-by: Amaury Pouly <amaury.pouly@gmail.com>
This reverts commit 462adf2a0f.
Leaving the card in TRAN results in a huge power consumption because some cards
and internal bridges do not automatically enter power saving mode in TRAN state.
Change-Id: If79efe8cf99b24174889b3a5ebbcb51b07085f58
The ZEN/ZEN-XFi seem to be very picky about the lcd. And they do not like
standby mode so I'm going to drop it, the OF doesn't use it anyway. I still
don't know what this "power" pin is about, obviously it's not real power but
the OF toggle it. Let's hope the lcd will finally become more stable with
fix: the driver now does full power on/off on enable/disable.
Change-Id: I1c465ee4f2462bc3d9507e5f575f0a181af60214
Tested on iPod Mini 1G.
Change-Id: I67ac9b7ed84c34533107136d0aa72e5ce3bcc5bc
Reviewed-on: http://gerrit.rockbox.org/668
Reviewed-by: Frank Gevaerts <frank@gevaerts.be>
