User reported LCD screen corruption via forum in 3.14 and 3.15
turning backlight off and back on seems to fix the issue
http://forums.rockbox.org/index.php/topic,53192.0.html
Change-Id: Id0b34d2f9b77e79ab0ecabace331f0b203184724
The pp502x cache init code tries to flush the cache by reading
a block of DRAM. Change the starting point from 0x0 to 0x1000
so the compiler doesn't helpfully insert an undefined instruction
to deliberately crash the target.
(This behavior is intentional on the part of GCC, and was triggered
by using -Os with my experimental 4.9.4 toolchain)
Change-Id: I2d2719615a1164a035f3dac8a56dd3737bbab1d5
7442742 ("iPod Classic: disable IRAM1") was causing subsequent ipod6g
bootloader builds to result in a completely black screen upon
installation, with recovery only possible with a reflash through DFU
mode.
IRAM1 is re-enabled for bootloader only.
Change-Id: I92d489c91f81cad55d66a8647c1e61a45f468770
On Classic, IRAM1 (second 128Kb of a total of 256KB available IRAM) is
slower than DRAM. Codecs that actually are using regions of IRAM1 runs
faster when DRAM is used, so IRAM1 is disabled and only IRAM0 remains
enabled: 48KB for core and 80KB for codecs/plugins.
The next test_codec results shows how decode time is decreased:
file boosted unboosted
*.ra ~1.5% ~0.5%
*.mpc ~21% ~4.5%
*.ogg ~0.5% ~0%
nero_he*.m4a ~8% ~1%
nero*.m4a ~25% ~7%
wmapro*.wma ~4.5% ~0%
wma*.wma ~25% ~7%
In addition there is a small power save when IRAM1 HW is disabled.
Change-Id: I102adee11458e82037f23076d5d5956e23235de8
Allow user to select cpu undervolt
There have been quite a few issues across the SANSA AMS line related
to CPU undervolting while most players show greatly increased runtime
some crash.
Rather than constanly upping the voltage we now have a
setting with a safe value for all players and the option for lower voltages
I plan to add a few other options here later such as disk
timings and maybe some other clocks/experimental settings
Added: Disk Low speed option for AS3525v2 devices cuts
frequency to 12 MHz from 24 MHz
Added: Disk Low speed option for AS3525v1 devices cuts
frequency to 15.5 MHz from 31 MHz
Added: I2c Low Speed AS3525 devices, should be bigger improvement for v1 devices
Fixed: Debug menu for AS3525v2 No SDSLOT frequency,
Showed IDE freq though it is unused
Added: DBOP and SSP underclocking affects display on v1/v2 respectively
Fixed: debug menu now has SSP frequency, and SSP_CPSR
Update: made settings menu more generic
Update: cleaned up code
Added: Clip v1 & Fuze v1 didn't have HAVE_ADJUSTABLE_CPU_VOLTAGE.
not sure why but, waiting on testing to confirm
Added: C200v2 and E200v2 devices and HAVE_ADJUSTABLE_CPU_VOLTAGE.
Fixed: v1 devices don't like display timing set lower (dbop)
v1 devices don't have a divider set for ssp (causes divide by 0)
Fixed: ClipZip display lags with Max SSP divider changed from 0xFE to 0x32
Fixed: v1 devices didn't work properly with highspeed sd cards
Added code from http://gerrit.rockbox.org/r/#/c/1704/
Added powersave and IDE interface enable/disable
Added: V2 devices now have powersave enabled on sd interface
Update: cleaned up code, lang defines, added manual entries
Update ssp clock mechanism added calculated ssp divider to clipzip
Update turn display clock off when clip+ turns off display
Fixed: clipzip wrong register for SSP clock
Change-Id: I04137682243be92f0f8d8bf1cfa54fbb1965559b
TODO: add other players?
Saves 100+ bytes (50 of it in iram), saves a bit of power
Internal LCD clock decreased but with added efficiency of drawing routines
loses only around 2 Hz on the scanrate (~75Hz) while fps is slightly increased
Column offsets are now calculated outside the loops saving a few instructions
Passing a LCD_NOP command after lcd_update turns off Data/Cmd# gpio
saving a bit more power
Added a function lcd_write_cmd_triple() that allows 3 commands to be sent at once
when enabled with LCD_USE_FIFO_FOR_COMMANDS it sends them back to back without
checking FIFO status in between or sending to thhe D/C# Gpio.
Makes an assumption about the FIFO being large enough to
accept 3 commands after being emptied which should be the case on the
clipv1, clipv2, clipplus. I have only enabled it for the clip plus
as thats the only device I have to test it on.
On clip+ the SSP clock is now turned off when screen is off
Change-Id: Ib5fd24697bfe4ac8b8ee017361e789e4a7910d21
On the clip zip most debug menu items get cut off and there is
no way to read most of the debug menu items.
This patch makes the menu button scroll the text 1 character
to the right with each press and the center (select) button
re-aligns the text
Adds SSP frequency(v2) & register
Adds SD slot frequency(v2)
Change-Id: If4705d6790e25061931ca654062e22fc2e0a6f16
I2c controller needs to be enabled in order to read CSPR0, CSPR1
registers function sets CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE
and only clears if it wasn't previously enabled
Use divider set in register to calculate frequency rather than
hard coded divider
Change-Id: I54ecc0c1859e906c00f4c2ae8ae2424a4619df98
Also removes the sd_enable() function call. It was only used in
the debug screen on AMSv1 and not used at all on AMS v2.
For v1,obtain debug info in a struture passed to a dedicated
debug info function so that enabling and disabling the controller
isn't racy.
Change-Id: I7c44693bc2df5a1f16168b05b3abfe622f9584ce
Lcd_update rect was hanging during horizontal screen update x = 238 and width = 2
which was within the bounds of the screen, this seems to be a weird corner case
but more testing needs done.
Update_rect now properly bounded between 0 - screen w/h
--Cleaned up code
Pixels in x are now multiples of 4.
Datasheet states:
-------------------------------------------------------------------------------------------
WORD_LENGTH=0 implies the input frame buffer is RGB 16 bits per pixel.
DATA_FORMAT_16_BIT field indicates if the pixels are in RGB 555 or RGB 565 format.
Limitations:
— BYTE_PACKING_FORMAT [3:0] should be 0x3 or 0xC if there is only one pixel per word.
— If there are two pixels per word, BYTE_PACKING_FORMAT [3:0] should be 0xF and
H_COUNT will be restricted to be a multiple of 2 pixels.
and
WORD_LENGTH=3 indicates that the input frame-buffer is RGB 24 bits per pixel (RGB 888). If
BYTE_PACKING_FORMAT [3:0] is 0x7, it indicates that there is only one pixel per 32-bit word
and there is no restriction on H_COUNT.
Limitations:
— If BYTE_PACKING_FORMAT [3:0] is 0xF, it indicates that the pixels are packed, i.e. there
are 4 pixels in 3 words or 12 bytes. In that case, H_COUNT must be a multiple of 4 pixels.
-------------------------------------------------------------------------------------------
We are using 16 bits per pixel and byte_packing = 0xF but device crashes with multiple of 2 pixels
Behaviour can be verified with plugin - oscilloscope, Horizontal mode device hangs as indicator
reaches right of screen
Change-Id: I1445f5334f4e7fe59304c65c76b47d0daa0614b2
Windows now ignores the hidden flag, so just nullify the entries
to hide depending upon whether or not bootloader install mode is
activated.
Change-Id: I00d0797e40ea3b5f5d5d8e1243b50cfcdd029bb4
Instead of checking ticks, set a sticky dirty flag that indicates
that the RTC needs to be read. This gives a timely update and more
accurate readout without actually reading the RTC until it changes.
The implementation should atomically read the flag and clear it.
Setting the flag would typically happen in an RTC tick ISR.
Change-Id: I6fd325f22845029a485c502c884812d3676026ea
New support as well as some buggy support fixed.
Still no floating point support if ever that would be desired.
Support (*):
* Flags: '-', '+', ' ', '#', '0'
* Width and precision: 'n', '.n', '*' and '.*'
* Length modifiers: 'hh', 'h', 'j', 'l', 'll', 't', 'z'
* Radix: 'c', 'd', 'i', 'n', 'o', 'p/P', 's', 'u', 'x/X'
(*) Provision exists to switch lesser-used stuff on or off or when
certain functionality isn't desired (bootloader?). The compulsory
radixes are everything but 'o', 'n', 'p/P' and 'x/X' with length
modifiers being optional. The default setup is 'l', 'z', 'c', 'd',
'p/P', 's', 'u', 'x/X'.
* Move fdprintf() to its own file. It was in a strange place.
* Make callers compatible and fix a couple snprintf() bugs while
at it.
Could smush it down in size but I'm gonna get over the binsize
neurosis and just the let optimizer do its thing.
Change-Id: Ibdc613a9b6775802c188b29b9dd46c568c94f7c3
At normal loads:
- disabling auto slow boosts performance at the cost of runtime (~ -5%)
- disabling at max cpu does not noticibly decrease runtime
Change-Id: I5de80201c9a24ce556862151cbd6b21b01708b63
Adds boot data to as3525 devices Sansa C200v2 E200v2 Clip Clipv2 Clip+ ClipZip
fuze, fuzev2 m200v4
Adds boot_data to features.txt
default arm crt0.s now had boot data if HAVE_BOOTDATA is defined
Change-Id: I614a556696540511a69fc12a4520b01c268bf8a9
Bootdata is a special location in the Firmware marked by a magic header
The bootloader is able to copy information to the firmware by locating
this struct and passing data to the firmware when it is loaded but
before it is actually executed
Data is verified by a crc of the bootdata
Change-Id: Ib3d78cc0c3a9d47d6fe73be4747a11b7ad6f0a9e
Playing AAC-HE files resulted in a race condition between
audio/codec/buffering for set_cpu_frequency
Change-Id: I35e1c1fd18db623e2990c305acdca03f57184d0d
* Editing a bunch of drivers' thread routines in order to
implement a new feature is tedious.
* No matter the number of storage drivers, they share one thread.
No extra threads needed for CONFIG_STORAGE_MULTI.
* Each has an event callback called by the storage thread.
* A default callback is provided to fake sleeping in order to
trigger idle callbacks. It could also do other default processing.
Changes to it will be part of driver code without editing each
one.
* Drivers may sleep and wake as they please as long as they give
a low pulse on their storage bit to ask to go into sleep mode.
Idle callback is called on its behalf and driver immediately put
into sleep mode.
* Drivers may indicate they are to continue receiving events in
USB mode, otherwise they receve nothing until disconnect (they
do receive SYS_USB_DISCONNECTED no matter what).
* Rework a few things to keep the callback implementation sane
and maintainable. ata.c was dreadful with all those bools; make
it a state machine and easier to follow. Remove last_user_activity;
it has no purpose that isn't served by keeping the disk active
through last_disk_activity instead.
* Even-out stack sizes partly because of a lack of a decent place
to define them by driver or SoC or whatever; it doesn't seem too
critical to do that anyway. Many are simply too large while at
least one isn't really adequate. They may be individually
overridden if necessary (figure out where). The thread uses the
greatest size demanded. Newer file code is much more frugal with
stack space. I barely see use crack 50% after idle callbacks
(usually mid-40s). Card insert/eject doesn't demand much.
* No forcing of idle callbacks. If it isn't necessary for one or
more non-disk storage types, it really isn't any more necessary for
disk storage. Besides, it makes the whole thing easier to implement.
Change-Id: Id30c284d82a8af66e47f2cfe104c52cbd8aa7215
Due to some undocumented behavior, the touchscreen was almost unusable in point
mode. Now it's much better but still not very nice to use, probably it needs some
filtering.
Change-Id: Idc8a0214b09f268e6be907ee6ec3126cc0d88773
SUPPORTED SERIES:
- NWZ-E450
- NWZ-E460
- NWZ-E470
- NWZ-E580
- NWZ-A10
NOTES:
- bootloader makefile convert an extra font to be installed alongside the bootloader
since sysfont is way too small
- the toolsicon bitmap comes from the Oxygen iconset
- touchscreen driver is untested
TODO:
- implement audio routing driver (pcm is handled by pcm-alsa)
- fix playback: it crashes on illegal instruction in DEBUG builds
- find out why the browser starts at / instead of /contents
- implement radio support
- implement return to OF for usb handling
- calibrate battery curve (NB: of can report a battery level on a 0-5 scale but
probabl don't want to use that ?)
- implement simulator build (we need a nice image of the player)
- figure out if we can detect jack removal
POTENTIAL TODOS:
- try to build a usb serial gadget and gdbserver
Change-Id: Ic77d71e0651355d47cc4e423a40fb64a60c69a80
The ZEN/X-Fi (STMP3700) don't handle memory frequency scaling really well, for
this reason we run it at a fixed frequency. That frequency was previously set
to 64Mhz because when the CPU run at its lowest frequency, we set the VDD voltage
to 0.975 V and on STMP3700, VDDD=VDDDMEM and this is too low to run EMI at 130Mhz.
This is not a good solution because under heavy load, running the EMI at 64Mhz
results in frame drops and a sluggish device. Thus we now run the EMI at 130Mhz
all the time now. To do so, increase the minimum VDD voltage to 1.275 V.
This may result is a decreased battery life on those targets but it will also
avoid all sorts of glictches and all the device to truly run at full speed.
Change-Id: Ia8391492c29fe67bc2701aa7d8cfd00a9df349e8
One cannot call lradc_acquire in IRQ context. The solution is to reserve the
channel once at init. There is an additional complication on STMP3600 where
channel mapping is fixed.
Change-Id: Idccbac634a4d9002703e2b1d57748beb9b245cbb
After compiling the ypz5 target, I have discovered that the keypad
system was refusing to compile, due to a much newer button API.
This patch adapts the target to the current imx233 implementation.
Additonally, some ADC button values have been re-adjusted.
Change-Id: Ib9bfd6aeec5e9e8dfef5887c4147201dd9028a44
- Fix broken recording from jack microphone.
- Fix recording hardware detection on models that do not support
the jack microphone.
- Enable monitor mode when recording.
Change-Id: Ib79a2746f2d75f74cf6667d33bc9ed6512bbc8a9
Many includes of fat.h are pointless. Some includes are just for
SECTOR_SIZE. Add a file 'firmware/include/fs_defines.h' for that
and to define tuneable values that were scattered amongst various
headers.
Remove some local definitions of SECTOR_SIZE since they have to be
in agreement with the rest of the fs code anyway.
(We'll see what's in fact pointless in a moment ;)
Change-Id: I9ba183bf58bd87f5c45eba7bd675c7e2c1c18ed5
As preparation to add new targets to the s5l8702 directory,
rename files as:
s5l8702/ipod6g/*-ipod6g.c -> s5l8702/ipod6g/*-6g.c
Change-Id: I0cd03d6bcf39b2aa198235f9014cb6948bbafcd5
* Remove unused bits like the radio event and simplify basic
radio interface. It can be more self-contained with rds.h only
required by radio and tuner code.
* Add post-processing to text a-la Silicon Labs AN243. The chip's
error correction can only do so much; additional checks are highly
recommended. Simply testing for two identical messages in a row
is extremely effective and I've never seen corrupted text since
doing that, even with mediocre reception.
Groups segments must arrive in order, not randomly; logic change
only accepts them in order, starting at 0.
Time readout was made a bit better but really we'd need to use
verbose mode and ensure that no errors were seen during receiving
of time and more checks would be need to have a stable PI. The
text is the important bit anyway.
* Time out of stale text.
* Text is no longer updated until a complete group has been
received, as is specified in the standard. Perhaps go back to
scrolling text lines in the radio screen?
* Add proper character conversion to UTF-8. Only the default G0
table for the moment. The other two could be added in.
* Add variants "RDS_CFG_PROCESS" and "RDS_CFG_PUSH" to allow
the option for processed RDS data to be pushed to the driver and
still do proper post-processing (only text conversion for now for
the latter).
Change-Id: I4d83f8b2e89a209a5096d15ec266477318c66925
Running at 130MHz is unsafe since on those targets, we disable memory frequency
scaling because it is unstable. That leads to situation where cpu is running at
64MHz and VDD is at 1.050V. But on STMP3700, the EMI uses the VDD rail instead
of a dedicated VDDMEM rail as on STMP3780. Thus we are essentially running the
EMI at 130MHz at 1.050V when the minimum recommened voltage is 1.2V. This commit
runs the EMI at 64MHz all the time on the ZEN and ZEN X-Fi which will lead to
reduce performance but hopefully increases stability.
Change-Id: Ida6c2ec130b1778973e383d7c44a06a6ca8f9268
This feature was never used and it is not even working because weak linking
doesn't work in-between files in a library.
Change-Id: I389ea5f17be1d9db0e2150828d704be5a091e09d
This is a quick patch to solve FS#13104, we can not disable the
clickwheel LDO from within interrupt code, so for the moment we
leave it enabled all the time, it is unknown how power comsumption
is affected when the hold switch is locked.
Change-Id: I8f675702e2b5becbcd9197c8b044e6b8daeea79f
Somewhere along the line the screen stopped being cleared prior to
writing new text on each frame, which left visible bits of
previously-displayed text when it changed.
Change-Id: I344e03c234daa77f4e64ed89281c40db887e4498
Fix stuff that was bugging me about the way I did it at first.
While messing around I found RDS code wasn't masking its GPIO
ISR as it should, which might lead to two different interrupts
messing with the static data.
Change-Id: I54626809ea3039a842af0cc9e3e42853326c4193
Remove "low power mode clocking" as we stop clocking by hands after each transfer.
Remove CGU_IDE and CGU_MEMSTICK as we don't use them.
Simplify logic in sd_transfer_sectors.
Change-Id: I120396d7ec5c99c62f3a746306aa8edd8686e08a
Some drivers set tm_wday just fine and do not need it coerced to
be correct. Others set tm_yday, so don't overwrite what the driver
sets; just zero it inside if it can't fill the field. Move calls
to set_day_of_week() to the sorts of drivers that presumably
required the hammer (FS#11814) in get_time() where the weekday
isn't locked to the date.
Change-Id: Idd0ded6bfc9d9f48fcc1a6074068164c42fcf24a
1. Slightly revised and regularized internal interface. Callback is used
for read and write to provide completion signal instead of having two
mechanisms.
2. Lower overhead for asynchronous or alterate completion callbacks. We
now only init what is required by the transfer. A couple unneeded
structure members were also nixed.
3. Fixes a bug that would neglect a semaphore wait if pumping the I2C
interrupts in a loop when not in thread state or interrupts are masked.
4. Corrects broken initialization order by defining KDEV_INIT, which
makes kernel_init() call kernel_device_init() to initialize additional
devices _after_ the kernel, threading and synchronization objects are
safe to use.
5. Locking set_cpu_frequency has to be done at the highest level in
system.c to ensure the boost counter and the frequency are both set in
agreement. Reconcile the locking inteface between PP and AMS (the only
two currently using locking there) to keep it clean.
Now works fine with voltages in GIT HEAD on my Fuze v2, type 0.
Previously, everything crashed and died instantly. action.c calling
set_cpu_frequency from a tick was part of it. The rest may have been
related to 3. and 4. Honestly, I'm not certain!
Testing by Mihail Zenkov indicates it solves our problems. This will
get the developer builds running again after the kernel assert code
push.
Change-Id: Ie245994fb3e318dd5ef48e383ce61fdd977224d4
It handles GPIO and PWM based LEDs, possibly with several channels (red-green
LED for example). The debug allows one to play with the setting.
Currently the code supports the ZEN, ZEN X-Fi, and ZEN Mozaic.
Change-Id: I8c3b66e6ba21778acdb123daabb724280a7d1a4f
On STMP3700 there is no dedicated speaker amplifier but speaker is always on
lineout so it makes sense to report volume and power down of lineout.
Change-Id: If666bccf36d3a5ecc6d892823522d023f3206184
On PCM record initialization, an unknown clockgate is enabled instead
of the I2S clockgate. This bug does not produce incorrect functionallity
because the right clockgate is already enabled on PCM playback
initialization.
Change-Id: I97a3a4a6f12131e492c1431359a0a976b68014be
There are lot IRQ and most are unused most of the time, this is annoying on
devices with small screens.
Change-Id: I7f3453f2768b8e35a5a367fbcf1e4cf3cf73bcd7
Those new statistics give the maximum time an IRQ took and also the total
time spent in IRQ, for each IRQ. Hopefully those do not take took much time
or space to collect. If this is the case, it can be enabled in debug builds only
the future.
Change-Id: I05af172897c5cb7ffcc9322452f974d8f968e29d
The IRQ handler saves registers on the IRQ stack, saves the old PC to imx233
HW_DIGCTL_SCRATCH0 register and switcht to SVC for the actual handling. The
old code had a problem in that if the unwinder is called during the IRQ (for
example by the watchdog), then __get_sp() will use SPSR_svc to discover the
previous mode, switch to it and recover SP. But SPSR_svc is invalid, it should
be SPSR_irq but we switch from IRQ to SVC mode. The new code copies SPSR_irq
to SPSR_svc in IRQ to fix this problem. It also saves/restore SCRATCH0 in
case I one day renable nested interrupts or use SCRATCH0 for other purposes.
I also changed the old watchdog code to call UIE directly instead of trying
to make the code crash with a SWI.
Change-Id: Id87462d410764b019bd2aa9adc71cb917ade32e3
The old code made the setting appear as 0dB, 1.5dB, 3dB and 4.5dB when
in fact it is 0dB, 3dB, 4.5dB and 6dB. This commit clarifies the code and
also fix this at the same time. This imx233 3D enhancement is complete crap anyway
but now you can satisfy yourself with 6 dB of pure crap, clearly an enhancement.
Change-Id: Ia3e088987c1ff0cdde228905ff70f46476a499a2
This commit adds the necessary code in the dualboot stub (bootloader) to
let rockbox control the boot process. In particular, rockbox can now choose
if the next boot will be normal (boot rockbox or OF on magic key), to OF
or to updater.
The intents (to be added in follow-up commits) are:
1) Let the user more easily reboot to the OF. On some targets it is not trivial,
especially in USB mode.
2) Automatically reboot to updater when the user drop firmware.sb at the root
of the drive (currently, the user needs to do that in OF USB mode)
3) Document this OF magic
Change-Id: I86df651dec048c318c6a22de74abb8c6b41aa9ad
This clearly fixes recording on targets where the bias pin was wrong. It may
also improve recording on targets where the bias voltage was wrong. I was unable
to find those parameters on the ZEN Mozaic, which fallback to default values.
Change-Id: Ifb5f823c9cbd01f0d9a80fa5d49d93972c8b7cfe
For some reason, there was a mismatch between the setting (decibel) and the
audiohw code (centicel). This resulted in a gain divided by 10. This may
explain why some people experienced low volume with the mic on the fuze+.
Change-Id: I138ac18dd93c36f43a7dfce735efc826405c598c
Based on emCORE.
Low level functions that do not depend on Rockbox kernel,
intended to be used by the bootloader, dualboot-installer,
RB drivers or other .dfu tools.
Change-Id: I3c616ded42260c6626bda23b7e580791981df61d
Based on emCORE.
Low level functions that do not depend on Rockbox kernel,
intended to be used by the bootloader, dualboot-installer,
RB drivers or other .dfu tools.
Change-Id: Iad369627b55bf1778eab437424072f1a653e4db6
- Some rewrite with the intent to get ride of these random errors
appearing on some builds/devices (not much noticeable on RB but
can ruin bootloader builds).
- Error handling (ACK).
- IIC clock increased to be the same as in OF.
Change-Id: Idf8cfa3c230a0a61ec9c879bf6f0ea8b061a4607
Add code to read USB D+/D- and accessory ADCs, it is shown in HW
debug menu, might be useful in future for RB and/or the bootloader
to identify external USB chargers.
Change-Id: Ia48ca5e06bb7ddc52bb55abedde6734653ce8dba
Based on g#844 and g#949, it is intended as a replacement for the
current s3c6400x USB driver.
The DesignWare USB OTG core is integrated into many SoC's, however
HW core version and capabilities (mainly DMA mode, Tx FIFO mode,
FIFO size and number of available IN/OUT endpoins) may differ:
CPU targets HW ver DMA NPTX FIFO FIFO sz #IN/OUT
-------- ------------- ------ --- --------- ------- -------
as3525v2 sansaclipplus 2.60a Yes Dedicated 0x535 4/4
sansaclipv2
sansaclipzip
sansafuzev2
s5l8701 ipodnano2g 2.20a Yes Shared 0x500 4/5
s5l8702 ipod6g 2.60a Yes Dedicated 0x820 7/7
ipodnano3g
s5l8720 ipodnano4g ? ? ? ? ?
Functionality supported by this driver:
- Device mode, compatible with USB 1.1/2.0 hosts.
- Shared FIFO (USB_DW_SHARED_FIFO) or dedicated FIFOs.
- No DMA (USB_DW_ARCH_SLAVE) or internal DMA mode.
- Concurrent transfers: control, bulk (usb_storage, usb_serial) and
interrupt (usb_hid).
Actually this driver is not used by any CPU, it will be enabled for
each individual CPU/target in next patches.
Change-Id: I74a1e836d18927a31f6977d71115fb442477dd5f
Apparently I simply forgot to calibrate it when the port was done and the
current values are just plain wrong, especially for the charging curve.
Change-Id: Ied3cafa52f31f182f953714e28edc4c5e891255f
There are two very suspicious things in the power off code:
- it does not properly unlock the power register, so it should fail (!)
- it does not disable sw/hw watchdog so if register fails, the device will
most probably crash horribly because of the watchdog
I don't even understand how it worked before.
Change-Id: I9f3f94bd012e52c3b50cd5b658d68b5eb907f79b
The old driver was bad in many respect, it had some race conditions, it was
using a thread to serialize transfers because of the legacy i2c interface.
It also had huge latency (typically 50ms but delays up to 300ms can happen),
thus some presses were missed.
The new driver takes advantage of the new i2c driver to do everything
asynchronously. It also does not need a thread anymore because queueing
ensures proper serialization. It provides much better and reliable latency
(typically ~2ms).
Also fix the debug screen which was horribly broken. The new screen also
displays the deadzones.
Change-Id: I69b7f99b75053e6b1d3d56beb4453c004fd2076e
The new driver provides several new features:
- asynchronous transfer
- transactions (several transfers executed at once)
- queueing
The style still provides the legacy interface.
Change-Id: I6d8ecc89d1f7057847c9b2dc69b76cd45c9c8407
Always enable support for SET_BLOCK_COUNT on mmc: it is mandatory. For some
reason (probably a mistake) it was disabled unconditionaly on mmc.
Also deselect sd card after init. Although it is unlikely to make a difference,
it is already done for mmc so stay consistent.
Change-Id: I276f0d95f5bb6a0bf431c2fff4589d3dfb15f8c7
The screen currently displays for each device the bus width, set_block_count
support, HS capability and whether it is enabled for not.
Change-Id: I6b1c3b1019e55ef1097a23c1f54fb07f5c7aa3b0
Some players like the ZEN X-Fi have a wide but not tall screen, it is
thus better to display everything on one line for each button
Change-Id: Ided3d4ff689cc5d3bcc2bdba4c7e046cf7dc0954
This screen allows to put the device in a special mode where:
- charging is disabled
- device only draws power from 5V (thus battery is untouched)
This is useful to measure the device consumption by measuring directly
the usb power consumption.
Change-Id: I2716ced0a5bb33c3c9a2607f2d17a0ce02f5689c
Per Freescale recommandation, we need to ramp up the 4.2V rail before enabling
charging. Ramping should be done at 1 step/10ms, but the old code did 1 step/1s
because the powermgmt_step() function is called once every second. Use a tick
task to ramp up much faster.
Change-Id: I9a52bdd0c2ba5426d83ed42db8db7ecce2fea1f7
The old code used button_get() to read the button status and wait for a
key to leave the panic screen. This is broken since when IRQ are disable,
the button mask is not updated anymore for touchpad and adc buttons. For
now, only use pswitch: this should be good enough for all targets.
Change-Id: I0ae179e24555ac20c3d2bf2d267c1bb0e2ceded0
The old timrot setup API was very low-level and unfriendly. The new one
makes in easier to select the frequency source. Use to simplify timer
and kernel timer code.
Change-Id: Iffcdf11c00e925be9ec8d9a4efc74b197b6bd2aa
The adc channel monitored for jack detection does not really have a fixed
value when plugged. Instead use the same logic as the OF and simply use a
threshold.
Change-Id: I1d5270d83eb14decce29a39d8201ea1d1fb4436c
For some reason those targets have quite imprecise button voltages and the
old margin was too small. This should fix the button-not-working issue,
especially when the player is very hot and cold.
Change-Id: I9fcddd7f079cd1c4ee121567fb21a4a0cbc0562b
The current driver is limited to checking if the adc value equals another
one with a hardcoded margin. This commit changes two aspects of that:
- the margin can be changed globally using IMX233_BUTTON_LRADC_MARGIN
and can also be overriden per button using the new LRADC_EX macro
- the lradc logic gained two comparison modes to check if the source
value is greater (or lower) than a threshold.
Change-Id: If1614451dafeae818a96e6f23a84e6731331ba03
Shorten some text to make the text readable in the debug screen of
targets with small LCD (like NWZ-380). In some screens, the only
option is to display less information.
Change-Id: I78f8f35f7c507de19e5d27a918157504155f2ba6
The power management code was erroneously shuting down the 4.2V rail
when charging is complete. This resulted in the DCDC draining the battery
and thus the battery discharging with USB plugged...
The new code keeps the 4.2V rail active so that battery remains untouched
once charge is complete.
Change-Id: I36e8d31e8115c12ce813c939c5d7bbf2c3490157
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
- Speed auto detection is launched when an accessory is inserted,
so the user doesn't need to modify settings to use accessories
that operates at different speeds (or when the same accessory is
unplugged and plugged again).
- UART controller is disabled when no accessory is inserted, not
much powersave but everything counts.
Change-Id: If20c3617c2a87b6277fd7e0270031030c44fa953
This change ensures that Sansa Connect bootloader.bin will fit in its flash
partition.
Fix _flash_sizem calculation, division was not working properly because
FLASHSIZE included subtraction and defined value was not in parenthesis.
Prior to this change _flash_sizem was 0x00800000, now it is correctly set
to 4 in case of Sansa Connect and 8 in case of other TMS320DM320 players.
This significantly improves boot time as cache is now enabled only for
real flash memory region.
Change-Id: If3e50a3075c840dcb69dfafe5bba608a0acd2bf8
PMU interrupts are used to detect USB Vbus, wall adaptor, accessories
and holdswitch. A thread is needed to poll the PMU throught I2C, ATM
it does nothing but showing the state of the inputs on the HW debug
menu, funcionallity for each individual input will be added in next
patches.
Change-Id: If93bf2044d1052729237a7fd1431c8493e09f1c7
Do not rely on a bootloader initializing the HW, RB initializes
and configures GPIO, I2C, and PMU at startup.
Change-Id: If7f856b1f345f63de584aa4e4fc22d130cd66c80
Low level functions that do not depend on Rockbox kernel,
intended to be used by the bootloader, dualboot-installer,
RB drivers or other .dfu tools.
Change-Id: If80214d26e505265ace19d9704f1e1300f98b2f4
When the bootloader starts, most of HW never has been initialized.
This patch includes all code needed to perform the preliminary
initialization on SYSCON, GPIO, i2c, and MIU.
The code is based on emCORE and OF reverse engineering, ported to
C for readability.
Change-Id: I9ecf2c3e8b1b636241a211dbba8735137accd05c
This patch optimizes UDMA timings to increase write transfer rate on
ATA bus, these transfers are clocked by HCLK, tDVS+tDVH is modified to
decrease Tcyctyp (typical write cycle period). This is not overclocking,
we meet the ATA standar, the settings used by OF are not well optimized
for each UDMA mode, we will never know but probably this was due some
documentation issue.
ATA_UDMA_TIME register is documented on s3c6400 datasheet, information
included in s5l8700 datasheet is wrong or not valid for s5l8702.
From ATA specs, (Minimum, Maximum) values in nanoseconds:
UDMA 0 UDMA 1 UDMA 2 UDMA 3 UDMA 4
tACKENV (20, 70) (20, 70) (20, 70) (20, 55) (20, 55)
tRP (160, --) (125, --) (100, --) (100, --) (100, --)
tSS (50, --) (50, --) (50, --) (50, --) (50, --)
tDVS (70, --) (48, --) (31, --) (20, --) (6.7, --)
tDVH (6.2, --) (6.2, --) (6.2, --) (6.2, --) (6.2, --)
tDVS+tDVH (120, --) (80, --) (60, --) (45, --) (30, --)
Tcyc = tDVS+tDVH
WR[bytes/s] = 1/Tcyc[s] * 2[bytes]
On Classic (boosted):
HClk = 108 MHz. -> T = ~9.26 ns.
Old values (used by OF):
UDMA ATA_UDMA_TIME tACK tRP tSS tDVS tDVH Tcyc WR(MB/s)
0 0x5071152 27.8 166.7 55.6 74.1 55.6 129.7 15.4
1 0x3050a52 27.8 101.8 55.6 55.6 37 92.6 21.6
2 0x3030a52 27.8 101.8 55.6 37 37 74 27
3 0x2020a52 27.8 101.8 55.6 27.8 27.8 55.6 36
4 0x2010a52 27.8 101.8 55.6 18.5 27.8 46.3 43.2
New values:
UDMA ATA_UDMA_TIME tACK tRP tSS tDVS tDVH Tcyc WR(MB/s)
0 0x4071152 27.8 166.7 55.6 74.1 46.3 120.4 16.6
1 0x2050d52 27.8 129.6 55.6 55.6 27.8 83.4 24
2 0x2030a52 27.8 101.8 55.6 37 27.8 64.8 30.9
3 0x1020a52 27.8 101.8 55.6 27.8 18.5 46.3 43.2
4 0x1010a52 27.8 101.8 55.6 18.5 18.5 37 54
To verify that the settings are correct, a write-to-cache test was
performed using emCORE, the measured transfer rate (WRm) is compared
against the theoric transfer rate (WR) at 108 Mhz for the old and
the new UDMA4 settings (iPod 160, HDD Toshiba MK1634GAL):
UDMA ATA_UDMA_TIME Tcyc(ns) WR(MB/s) WRm(MB/s) RDm(MB/s)
4 0x2010a52 46.3 43.2 42.9 59.8
4 0x1010a52 37 54 53.5 59.8
Notes:
- The new UDMA4 settings increases ~25% the ATA transfer rate for
cached-writes. The real HDD write speed is limited by the internal
transfer rate (depends on cilinder, for the MK1634GAL it is 276 to
573 Mbits/s). Sequential write benchmark using diskdump on USB are
~8% faster.
- Read transfers are clocked by the device, it depends on UDMA mode
selected and are not affected by HClk or ATA_UDMA_TIME settings.
Read-from-cache tests results (RDm) using HClk=108 and HClk=54 for
UDMA4 are 59.8 MB/s on MK1634GAL.
- Minimum HClk is limited by tACKENV specs, using current settings
it is 54 MHz for UDMA4,UDMA3 and 43 MHz for UDMA2,UDMA1,UDMA0.
Change-Id: I61d67060410752518a59e1ff08072b21747ca997
When the bootloader starts only IRAM is available, the first task is to
ask the PMU to verify if the iPod has previously been hibernated by OF.
Due to memory limitations, the kernel cannot be used on this stage.
This patch modifies I2C and PMU low level functions to not to depend
on kernel (removes mutexes, and uses HW timer instead of current_tick),
actual kernel functions are modified to be 'mutexed' wrappers of the new
functions.
Change-Id: I7cef9e95dedaf176dc0659315f3dc33166d5b116
Add UART support for s5l8700/1 using the UC870X UART controller,
actually the functionallity is disabled and must be enabled for
each individual target. Tested on iPod Nano 2G (s5l8701), not
tested on s5l8700.
Change-Id: Ic0f216bb871502d355a70e4b658e536a2c0976a9
- Small rework on the UC8702 UART controller to make it compatible with
other s5l870x SOCs. Files moved and renamed, many conditional code
added to deal with capabilities and 'features' of the different CPUs.
- A couple of optimizacions that should not affect the functionality.
Change-Id: I705169f7e8b18d5d1da642f81ffc31c4089780a6
