2021-02-27 22:08:58 +00:00
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#include "config.h"
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2021-04-26 21:57:31 +00:00
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#include "cpu.h"
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2021-02-27 22:08:58 +00:00
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OUTPUT_FORMAT("elf32-littlemips")
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OUTPUT_ARCH(MIPS)
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2021-05-11 12:28:43 +00:00
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ENTRY(_spl_start)
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STARTUP(target/mips/ingenic_x1000/spl-start.o)
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2021-02-27 22:08:58 +00:00
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2021-04-05 12:21:42 +00:00
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MEMORY {
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2022-02-28 16:00:33 +00:00
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TCSM : ORIGIN = X1000_SPL_EXEC_ADDR,
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LENGTH = X1000_SPL_SIZE
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2021-04-05 12:21:42 +00:00
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}
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2021-02-27 22:08:58 +00:00
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SECTIONS
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{
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.text :
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{
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2022-12-03 11:27:20 +00:00
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*(.startup.spl);
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2021-02-27 22:08:58 +00:00
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*(.text*);
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2021-04-25 12:43:58 +00:00
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*(.icode*);
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2022-12-30 23:18:02 +00:00
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*(.init*);
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2021-02-27 22:08:58 +00:00
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} > TCSM
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. = ALIGN(4);
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.rodata :
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{
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*(.rodata*);
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} > TCSM
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. = ALIGN(4);
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.data :
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{
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*(.data*);
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*(.sdata*);
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} > TCSM
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. = ALIGN(4);
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.bss (NOLOAD) :
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{
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_bssbegin = .;
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*(.sbss*);
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*(.bss*);
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*(COMMON);
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*(.scommon*);
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_bssend = .;
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} > TCSM
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2021-04-05 12:21:42 +00:00
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2021-04-25 15:17:33 +00:00
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/DISCARD/ :
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{
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*(.MIPS.abiflags);
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*(.eh_frame);
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*(.rel.dyn);
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}
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2021-02-27 22:08:58 +00:00
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}
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