2021-02-27 22:08:58 +00:00
|
|
|
#include "config.h"
|
|
|
|
|
|
|
|
OUTPUT_FORMAT("elf32-littlemips")
|
|
|
|
OUTPUT_ARCH(MIPS)
|
|
|
|
ENTRY(_start)
|
|
|
|
STARTUP(target/mips/ingenic_x1000/crt0.o)
|
|
|
|
|
2021-04-05 12:21:42 +00:00
|
|
|
#define DRAMORIG 0x80000000
|
|
|
|
#define DRAMSIZE (MEMORYSIZE * 0x100000)
|
|
|
|
#define USED_DRAM 16K
|
|
|
|
|
2021-02-27 22:08:58 +00:00
|
|
|
/* TCSM is 16 KiB and is mapped starting at address 0xf4000000.
|
|
|
|
*
|
|
|
|
* The SPL is loaded to TCSM + 0x1000. The area below that is stack space.
|
|
|
|
* The first 2 KiB of SPL is just headers. The code begins at TCSM + 0x1800.
|
|
|
|
* The maskrom will jump to that address (via jalr) after loading the SPL.
|
|
|
|
*/
|
2021-04-05 12:21:42 +00:00
|
|
|
MEMORY {
|
|
|
|
TCSM : ORIGIN = 0xf4001800, LENGTH = 0x2800
|
|
|
|
DRAM : ORIGIN = DRAMORIG + DRAMSIZE - USED_DRAM, LENGTH = USED_DRAM
|
|
|
|
}
|
2021-02-27 22:08:58 +00:00
|
|
|
|
|
|
|
SECTIONS
|
|
|
|
{
|
|
|
|
.text :
|
|
|
|
{
|
|
|
|
*(.init.text);
|
|
|
|
*(.text*);
|
2021-04-25 12:43:58 +00:00
|
|
|
*(.icode*);
|
2021-02-27 22:08:58 +00:00
|
|
|
} > TCSM
|
|
|
|
|
|
|
|
. = ALIGN(4);
|
|
|
|
.rodata :
|
|
|
|
{
|
|
|
|
*(.rodata*);
|
|
|
|
} > TCSM
|
|
|
|
|
|
|
|
. = ALIGN(4);
|
|
|
|
.data :
|
|
|
|
{
|
|
|
|
*(.data*);
|
|
|
|
*(.sdata*);
|
|
|
|
} > TCSM
|
|
|
|
|
|
|
|
. = ALIGN(4);
|
|
|
|
.bss (NOLOAD) :
|
|
|
|
{
|
|
|
|
_bssbegin = .;
|
|
|
|
*(.sbss*);
|
|
|
|
*(.bss*);
|
|
|
|
*(COMMON);
|
|
|
|
*(.scommon*);
|
|
|
|
_bssend = .;
|
|
|
|
} > TCSM
|
2021-04-05 12:21:42 +00:00
|
|
|
|
|
|
|
.sdram (NOLOAD) :
|
|
|
|
{
|
|
|
|
*(.sdram);
|
|
|
|
} > DRAM
|
2021-04-25 15:17:33 +00:00
|
|
|
|
|
|
|
/DISCARD/ :
|
|
|
|
{
|
|
|
|
*(.MIPS.abiflags);
|
|
|
|
*(.eh_frame);
|
|
|
|
*(.rel.dyn);
|
|
|
|
}
|
2021-02-27 22:08:58 +00:00
|
|
|
}
|