FCLK is unused because we use fastbus clocking: CPU clock = PCLK
Base PCLK off PLLA and use the lowest frqeuency for FCLK (24MHz source,
maximum divider)
Save a bit of power, adjust Clipv1/e200v2/Fuzev1 current usage accordingly
Note: the power saving (in mA) is a bit less on e200v2/Fuzev1 than on Clipv1
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28000 a1c6a512-1295-4272-9138-f99709370657
Without this change the backlight would be enabled but the screen would
show the last content displayed before the screen went off
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27957 a1c6a512-1295-4272-9138-f99709370657
- Revert BUTTON_HOME
- Modifications to SD driver (µSD not working yet)
TODO: µSD and FM radio
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27492 a1c6a512-1295-4272-9138-f99709370657
it achieves all the requirements, work fine on c200v2, and is much simpler
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26933 a1c6a512-1295-4272-9138-f99709370657
Reserve 1MB of DRAM for loading rockbox and use the rest as BSS
Write sdram setup in assembler and move it to a separate file, together
with MMU init code
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26926 a1c6a512-1295-4272-9138-f99709370657
Declare VIC registers holding function pointers as volatile pointers to
function pointers and access them directly without casting
UIRQ() is an IRQ handler too, even if it doesn't return
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26313 a1c6a512-1295-4272-9138-f99709370657
We assume only one bit is set and use clz to find the most significant
set bit, if there's more than one bit set we'll see it in the panic msg
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26285 a1c6a512-1295-4272-9138-f99709370657
it's only needed if we hotswap the µSD or if we build the fuzev2
scrollwheel code without irq (which we don't do anyway)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26165 a1c6a512-1295-4272-9138-f99709370657
The list is ordered by priority, put the DMA and SD interrupts at
the top
This seems to fix the random freezes on heavy storage operation like
building database or pictureflow cache
The recently added audio interrupt had a priority higher than SD slot on
as3525v1, give it a lower priority
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26160 a1c6a512-1295-4272-9138-f99709370657
When the rest of the code is confirmed to work properly without CPU
frequency changes, it will be possible to reliabily test set_cpu_frequency()
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25924 a1c6a512-1295-4272-9138-f99709370657
Get a bit more battery life (between 30 minutes and 2 hours)
as3525v2: only enabled in bootloader, we need a new binary release anwyway
as3525v1: enabled in rockbox.sansa as well, so we can continue using the
current bootloaders
Flyspray: FS#11246
Author: myself
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25900 a1c6a512-1295-4272-9138-f99709370657
delays after modifying the registers seems not to be needed
moving RAM operation (cpu_frequency variable) before modifying the
register also seems to help
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25754 a1c6a512-1295-4272-9138-f99709370657
We do not need any delay after modifying it in system_init(), so the
same applies in set_cpu_frequency()
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25753 a1c6a512-1295-4272-9138-f99709370657
PCLK doesn't use PLLA as a source but FCLK, so when changing FCLK with
CGU_PROC register, we must change PCLK as well with CGU_PERI register
Operate with 24MHz PCLK (and unboosted FCLK) for Clipv2/Clip+
Use 60MHz on Fuzev2 to keep the display fast enough (still slower than
Fuzev1 though)
µSD seems to function correctly now
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25475 a1c6a512-1295-4272-9138-f99709370657
the arm926-ejs doesn't have synchronous/asynchronous/fastbus modes, so
just change CGU_PROC directly
Note: we could use a lower unboosted frequency now
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25417 a1c6a512-1295-4272-9138-f99709370657
Write the setting before enabling the PLL
Fix booting problem (black screen) with Clip+
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25415 a1c6a512-1295-4272-9138-f99709370657
Instead of modifying CGU_PROC to get 24MHz pclk, just switch to fastbus else Clip+ wouldn't boot
Tested on fuzev1/Clip+
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25413 a1c6a512-1295-4272-9138-f99709370657
We do not need a stack pointer at this step, and we are sure to not use
memory not initialized yet (like bss)
Fixes FS#11114 (tested on Fuze)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25229 a1c6a512-1295-4272-9138-f99709370657
Compilation shows a warning for the first argument of the lcd_bitmap() call in show_logo().
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24911 a1c6a512-1295-4272-9138-f99709370657
Differences remaining:
- list of peripherals reset
- CGU_PROC isn't modified on as3525v2
- CGU_PLLA bits aren't known, but we use a known setting for 240MHz
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24868 a1c6a512-1295-4272-9138-f99709370657
