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80 commits

Author SHA1 Message Date
Rafaël Carré
74cee6297c rolo: use BX for ARM branches 
This is equivalent to mov pc
Remove an instruction from the asm() for PP cop restart : use register constraint

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26431 a1c6a512-1295-4272-9138-f99709370657
 2010-05-31 14:42:27 +00:00
Thomas Martitz
50a6ca39ad Move c/h files implementing/defining standard library stuff into a new libc directory, also standard'ify some parts of the code base (almost entirely #include fixes). 
This is to a) to cleanup firmware/common and firmware/include a bit, but also b) for Rockbox as an application which should use the host system's c library and headers, separating makes it easy to exclude our files from the build.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25850 a1c6a512-1295-4272-9138-f99709370657
 2010-05-06 21:04:40 +00:00
Rafaël Carré
1bc59454d5 rolo: make PP code pp6100-compatible 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25798 a1c6a512-1295-4272-9138-f99709370657
 2010-05-03 21:50:48 +00:00
Michael Sevakis
11cca264ff i.MX31/Gigabeat S: Implement frequency and voltage scaling-- 1.6V for 528MHz, and 1.35V for 264MHz and 132MHz. Keep DPTC overdrive ( > 400MHz) voltage scaling off for now because of uncertainties. Simplify the (working) mess later. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25699 a1c6a512-1295-4272-9138-f99709370657
 2010-04-23 15:32:50 +00:00
Michael Sparmann
6afe802a83 Add a "Flushing storage buffers" message to ROLO if it needs to do that. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23313 a1c6a512-1295-4272-9138-f99709370657
 2009-10-21 20:29:51 +00:00
Michael Sparmann
940fd995a4 storage_flush() should be done before disabling interrupts in ROLO. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23312 a1c6a512-1295-4272-9138-f99709370657
 2009-10-21 20:21:41 +00:00
Jens Arnold
2dd45f7c6d Make RoLo work on PP5002. * Rename CACHE_CTL flag values on PP5002 for consistency. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23277 a1c6a512-1295-4272-9138-f99709370657
 2009-10-19 21:38:52 +00:00
Thomas Martitz
ee7247998a Fix rolo for AMS Sansa and simplify a few #ifdefs. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23275 a1c6a512-1295-4272-9138-f99709370657
 2009-10-19 21:32:40 +00:00
Dave Chapman
178337970e Nano2G - call storage_flush() before rolo_restart() to ensure FTL is flushed. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23087 a1c6a512-1295-4272-9138-f99709370657
 2009-10-11 02:06:42 +00:00
Dave Chapman
0ada0ae789 Enable rolo on the Nano2G - it hasn't been thoroughly tested, but seems to be working. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23086 a1c6a512-1295-4272-9138-f99709370657
 2009-10-11 01:54:29 +00:00
Maurus Cuelenaere
48203093ce Fix RoLo on MIPS targets 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21185 a1c6a512-1295-4272-9138-f99709370657
 2009-06-04 11:57:43 +00:00
Karl Kurbjun
4fa96fbc91 M:Robe 500i: More LCD initialization, and beginnings of support for QVGA as well as VGA on the LCD. MPEGPlayer now works with reasonable performance on smaller videos, but YUV blitting persists after MPEGPlayer is left, some cleanup/changes to the initialization code. This should be functionally equivalent for the ZVM, but the #ifdef's may need to be added back for app.lds. Get the bootloader building again. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20598 a1c6a512-1295-4272-9138-f99709370657
 2009-04-01 03:21:18 +00:00
Maurus Cuelenaere
38436038a9 Ingenic Jz4740: 
* Add initial RoLo support
 * Don't enable IRAM in plugins for now
 * Initial try at getting PCM working (doesn't crash anymore at least)
 * Replace hard-coded constant with #define in usb-jz4740


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20115 a1c6a512-1295-4272-9138-f99709370657
 2009-02-26 21:15:40 +00:00
Michael Sevakis
21f0c9a282 Make basic cache functions into calls, and get rid of CACHE_FUNCTION_WRAPPERS and CACHE_FUNCTIONS_AS_CALL macros. Rename flush/invalidate_icache to cpucache_flush/invalidate. They're inlined only if an implementation isn't provided by defining HAVE_CPUCACHE_FLUSH/INVALIDATE. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19971 a1c6a512-1295-4272-9138-f99709370657
 2009-02-11 12:55:51 +00:00
Rafaël Carré
6b566568eb Fix Clip firmware building by adding missing symbols 
Implement some of the new functions
Use as3514 rtc
Add AS3525 case in rolo.c
Copy card_get_info_target() from ata-sd-pp.c , and use the correct 32bits words order

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19064 a1c6a512-1295-4272-9138-f99709370657
 2008-11-10 11:04:43 +00:00
Daniel Stenberg
2acc0ac542 Updated our source code header to explicitly mention that we are GPL v2 or 
later. We still need to hunt down snippets used that are not. 1324 modified
files...
http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
 2008-06-28 18:10:04 +00:00
Michael Sevakis
fa5bd07f6b Oops. Lost sync on a few instances and 'HI' registers. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17684 a1c6a512-1295-4272-9138-f99709370657
 2008-06-03 05:19:32 +00:00
Michael Sevakis
191320cd0f Rename CPU/COP_INT_CLR to CPU/COP_INT_DIS since it's really a 'write one to disable' register and hasn't anything to do with acknowledging interrupts-- that's handled at the module level. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17683 a1c6a512-1295-4272-9138-f99709370657
 2008-06-03 05:08:24 +00:00
Michael Sevakis
6dd6ea74af Gigabeat S RoLo: Properly execute firmware copy from an IRAM stub because the currently running image was being overwritten in place. Minor tweak to rolo.c based on imx31 errata sheet about not masking FIQ without masking IRQ which is fine to use on all ARM anyway. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17414 a1c6a512-1295-4272-9138-f99709370657
 2008-05-08 12:09:14 +00:00
Bertrik Sikken
2124a9fad0 Made rolo.h consistent with rolo.c 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17310 a1c6a512-1295-4272-9138-f99709370657
 2008-05-03 07:17:44 +00:00
Karl Kurbjun
6c6a2ed910 Working ROLO for the Gigabeat F/X 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17304 a1c6a512-1295-4272-9138-f99709370657
 2008-05-02 03:27:17 +00:00
Michael Sevakis
7fee4868f9 For TCC and IMX Rolo, use a full flush and invalidate before branching. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17149 a1c6a512-1295-4272-9138-f99709370657
 2008-04-16 23:49:21 +00:00
Will Robertson
735790fde0 Some general housekeeping. Fixed a few yellows, made the volume buttons work in lists. ROLO now works also thanks to rob's work on the D2. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17139 a1c6a512-1295-4272-9138-f99709370657
 2008-04-16 08:30:30 +00:00
Rob Purchase
d88c5667d9 Kill some D2 yellows with a simplistic Rolo implementation and NAND driver cleanup. Correct some comments in crt0.s and remove two erroneous null words from rockbox.bin 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17127 a1c6a512-1295-4272-9138-f99709370657
 2008-04-15 20:02:24 +00:00
Steve Bavin
ba58dd8d35 Fix some red. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17121 a1c6a512-1295-4272-9138-f99709370657
 2008-04-15 15:41:13 +00:00
Michael Sevakis
040b6cc654 Kill warnings that annoy me when building for Gigabeat S. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17120 a1c6a512-1295-4272-9138-f99709370657
 2008-04-15 14:44:32 +00:00
Dave Chapman
78d29f535f Major cleanup of checkwps - fix all warnings and add a script to build versions for all supported targets (plus some unsupported ones). You now need to run the version of checkwps that matches the device your WPS is for. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16831 a1c6a512-1295-4272-9138-f99709370657
 2008-03-26 23:35:34 +00:00
Michael Sevakis
af395f4db6 Do core interrupt masking in a less general fashion and save some instructions to decrease size and speed things up a little bit. Small fix to a few places where interrupts would get enabled again where they shouldn't have been (context switching calls when disabled). 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16811 a1c6a512-1295-4272-9138-f99709370657
 2008-03-26 01:50:41 +00:00
Jens Arnold
ed3ff1b0b5 Various coldfire fixes: (1) iAudio Bootloader: Check the status of main & remote power button vs. the respective hold switch, and shut down when on hold. On X5/M5 this check is not strictly necessary for the main unit, but left there to keep things uniform. (2) M3: Stop reading the ADC properly before leaving the bootloader, on RoLo, and on reboot, to make it work reliably after those transitions. (3) Disable all interrupt sources on system init to avoid premature ISR calls after enabling interrupts in general. (4) iAudios: Proper implementation of ide_powered(), avoiding nasty HDD clicks in the bootloader when powering down, e.g. because of Hold. (5) Slight optimisations. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16689 a1c6a512-1295-4272-9138-f99709370657
 2008-03-17 23:47:38 +00:00
Karl Kurbjun
d3d0b26421 Work in progress fixes to the remote button handling. Now the remote can be unplugged and then plugged in and it will work. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15628 a1c6a512-1295-4272-9138-f99709370657
 2007-11-15 06:44:35 +00:00
Karl Kurbjun
1b3dac9042 Setup the gigabeat so that iram is faked in a different spot since the normal iram location does not seem to be working. This lays the groundwork to get rolo running. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15581 a1c6a512-1295-4272-9138-f99709370657
 2007-11-11 19:13:09 +00:00
Michael Sevakis
a9b2fb5ee3 Finally full multicore support for PortalPlayer 502x targets with an eye towards the possibility of other types. All SVN targets the low-lag code to speed up blocking operations. Most files are modified here simple due to a name change to actually support a real event object and a param change to create_thread. Add some use of new features but just sit on things for a bit and leave full integration for later. Work will continue on to address size on sensitive targets and simplify things if possible. Any PP target having problems with SWP can easily be changed to sw corelocks with one #define change in config.h though only PP5020 has shown an issue and seems to work without any difficulties. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15134 a1c6a512-1295-4272-9138-f99709370657
 2007-10-16 01:25:17 +00:00
Karl Kurbjun
b7a4e101cb M:Robe - Fix compilation and remove some warnings 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15095 a1c6a512-1295-4272-9138-f99709370657
 2007-10-13 14:53:34 +00:00
Michael Sevakis
e760ba5a04 Add some defines for pp502x. No guarantee as to full accuracy yet but that's not really too important. Use them in the code. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14912 a1c6a512-1295-4272-9138-f99709370657
 2007-09-30 10:53:31 +00:00
Michael Sevakis
3e7d4f0d14 Anti-red? 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14899 a1c6a512-1295-4272-9138-f99709370657
 2007-09-29 06:56:21 +00:00
Michael Sevakis
7914e90738 Commit a subset of the dual core changes that have to do with cache handling, stacks, firmware startup and thread startup. Tested on e200, H10-20GB, iPod Color and 5.5G. Thread function return implemented for all targets. Some changes to plugins to follow shortly. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14879 a1c6a512-1295-4272-9138-f99709370657
 2007-09-28 10:20:02 +00:00
Nils Wallménius
4102ed56f0 Revert cosmetic change and staticing of the rolo_restart() function, because it would break rolo for gigabeat if anyone ever implemented it (because ICODE_ATTR is defined to be null for gigabeats). 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13924 a1c6a512-1295-4272-9138-f99709370657
 2007-07-17 14:53:44 +00:00
Nils Wallménius
76fa0f7e30 Make a private function static where possible, add a comment, make a small cosmetic change 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13918 a1c6a512-1295-4272-9138-f99709370657
 2007-07-16 19:26:07 +00:00
Jens Arnold
fe23dc8f15 Improved CPU clock setup for PP502x. PP5020 and PP5022 are not register compatible here, so define the PP5022 targets properly, and introduce a CPU_PP502x macro for easier family check. Improves stability on PP5020 (less freezing, tested with Mini G1) and reduces clock change penalty (500us on PP5020; uses the relock bit on PP5022). 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13763 a1c6a512-1295-4272-9138-f99709370657
 2007-07-02 05:16:40 +00:00
Barry Wardell
54c73a24b6 Bring back rolo for mi4-based targets (H10 and Sansa). 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13550 a1c6a512-1295-4272-9138-f99709370657
 2007-06-04 13:48:21 +00:00
Michael Sevakis
d95c39072a Portal Player: Add invalidate_icache and flush_icache. Flush the cache on the core for newborn threads. In doing so, move more ARM stuff to the target tree and organize it to make a clean job of it. If anything isn't appropriate for some particular device give a hollar or even just fix it by some added #ifdefing. I was informed that the PP targets are register compatible so I'm going off that advice. The Sansa likes it though. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13144 a1c6a512-1295-4272-9138-f99709370657
 2007-04-13 20:55:48 +00:00
Daniel Ankers
ee07215d50 Fix RoLo on PortalPlayer targets 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12609 a1c6a512-1295-4272-9138-f99709370657
 2007-03-04 23:53:38 +00:00
Barry Wardell
8b061252c4 Replace some inl/outl with register #define's instead. Also tidy up pp5020.h so that it's in increasing address order. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12574 a1c6a512-1295-4272-9138-f99709370657
 2007-03-03 17:25:20 +00:00
Daniel Ankers
b856636f85 Improved RoLo support for PortalPlayer - handles the COP correctly 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12511 a1c6a512-1295-4272-9138-f99709370657
 2007-02-27 22:55:12 +00:00
Barry Wardell
2f16d4f1b3 Add working dual-boot bootloaders for H10 and Sansa, which allow booting the OF and Rockbox. Rolo also works. 
Changes made:

Combine bootloader/h10.c and bootloader/e200.c into a common bootloader file (bootloader/main-pp.c) to be used by all mi4 based PortalPlayer targets. The file bootloader/main-pp.c is based off the old bootloader/h10.c with some minor changes to allow it to work on the Sansa too. This effectively adds a Sansa bootloader.

Define MODEL_NAME string in config-*.h for use in bootloader.

Split crt0-pp.S into separate files for bootloader and normal builds. Bootloader code is now in crt0-pp-bl.S while normal build code stays in crt0-pp.S.

Improvements to crt0-pp.S and crt0-pp-bl.S (mostly to make it more multiprocessor safe):
* Leave space in bootloader at 0xe0-0xeb since scramble writes over there when it creates the mi4 file (don't leave space for iPods since it's not needed and all code in crt0-pp-bl.S needs to fit before the boot_table at 0x100).
* Remove unused DEBUG and STUB code from crt0-pp.S.
* Make CPU wait for COP to be sleeping when we put the COP to sleep.
* Invalidate COP cache when COP wakes
* Flush CPU cache before waking COP
* Make sure only the CPU clears the BSS (not the COP)
* Make sure only the CPU sets up its own stack (not the COP)

Rolo works on H10, so enable it.

Make Sansa e200 use rockbox.e200 rather than PP5022.mi4 for 'Normal' builds. This makes updating rockbox simpler as we don't need to go through the firmware update procedure, but rather just put a new rockbox.e200 on the device. rockbox.e200 uses a simple 'add' checksum.


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11815 a1c6a512-1295-4272-9138-f99709370657
 2006-12-19 11:33:53 +00:00
Daniel Ankers
f28a15f949 Remove useless code from rolo.c 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11708 a1c6a512-1295-4272-9138-f99709370657
 2006-12-10 15:53:26 +00:00
Daniel Ankers
cb51abb77c Slightly improved RoLo for PortalPlayer targets 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11707 a1c6a512-1295-4272-9138-f99709370657
 2006-12-10 15:20:26 +00:00
Daniel Ankers
242cbd5cd7 Change if CONFIG_CPU==PP50XX to ifdef CPU_PP where appropriate 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11569 a1c6a512-1295-4272-9138-f99709370657
 2006-11-22 00:41:30 +00:00
Jens Arnold
780f79e7a4 Removed the Gmini 120 and Gmini SP code. These ports are dead, unfortunately. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11504 a1c6a512-1295-4272-9138-f99709370657
 2006-11-10 20:26:01 +00:00
Marcoen Hirschberg
37f7f0b23b reduce the number of gigabeat warnings 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11316 a1c6a512-1295-4272-9138-f99709370657
 2006-10-23 13:11:57 +00:00