Allow IPod 3rd generation to recognize when USB is connected and reboot into disk mode.
This problem is listed at the bottom of the Ipod status page https://www.rockbox.org/wiki/IpodStatus
Change-Id: I8f32afd065d3a91cddc56fe63454bd082bfa29b9
If we come up and the RTC is in a reset state, we need to release that
before trying to initialze anything else. (See IMX23RM 23.8.1 and 39.3.10)
Change-Id: I1820ab771ba81f7d428d07040b7d188d9f688127
For reasons that are still unclear, the 'ncbss' region was overlapping
the "audiobuffer" when linked with 2.21, but okay with 2.20.
Fixed it by making the audiobuffer explcitly use the current position
instead of relying on it being implicit.
With this change, portalplayer-based targets generate working binaries
when built with binutils 2.21 or newer.
This bug also theoretically affects imx233/imx31 targets as they
also have NOCACHE_BASE games in their linker scripts, but I lack
access to one to test with.
Change-Id: Idb38ab20f03599b9ed3d4bc0eafe519f38677438
User reported LCD screen corruption via forum in 3.14 and 3.15
turning backlight off and back on seems to fix the issue
http://forums.rockbox.org/index.php/topic,53192.0.html
Change-Id: Id0b34d2f9b77e79ab0ecabace331f0b203184724
The pp502x cache init code tries to flush the cache by reading
a block of DRAM. Change the starting point from 0x0 to 0x1000
so the compiler doesn't helpfully insert an undefined instruction
to deliberately crash the target.
(This behavior is intentional on the part of GCC, and was triggered
by using -Os with my experimental 4.9.4 toolchain)
Change-Id: I2d2719615a1164a035f3dac8a56dd3737bbab1d5
7442742 ("iPod Classic: disable IRAM1") was causing subsequent ipod6g
bootloader builds to result in a completely black screen upon
installation, with recovery only possible with a reflash through DFU
mode.
IRAM1 is re-enabled for bootloader only.
Change-Id: I92d489c91f81cad55d66a8647c1e61a45f468770
On Classic, IRAM1 (second 128Kb of a total of 256KB available IRAM) is
slower than DRAM. Codecs that actually are using regions of IRAM1 runs
faster when DRAM is used, so IRAM1 is disabled and only IRAM0 remains
enabled: 48KB for core and 80KB for codecs/plugins.
The next test_codec results shows how decode time is decreased:
file boosted unboosted
*.ra ~1.5% ~0.5%
*.mpc ~21% ~4.5%
*.ogg ~0.5% ~0%
nero_he*.m4a ~8% ~1%
nero*.m4a ~25% ~7%
wmapro*.wma ~4.5% ~0%
wma*.wma ~25% ~7%
In addition there is a small power save when IRAM1 HW is disabled.
Change-Id: I102adee11458e82037f23076d5d5956e23235de8
Allow user to select cpu undervolt
There have been quite a few issues across the SANSA AMS line related
to CPU undervolting while most players show greatly increased runtime
some crash.
Rather than constanly upping the voltage we now have a
setting with a safe value for all players and the option for lower voltages
I plan to add a few other options here later such as disk
timings and maybe some other clocks/experimental settings
Added: Disk Low speed option for AS3525v2 devices cuts
frequency to 12 MHz from 24 MHz
Added: Disk Low speed option for AS3525v1 devices cuts
frequency to 15.5 MHz from 31 MHz
Added: I2c Low Speed AS3525 devices, should be bigger improvement for v1 devices
Fixed: Debug menu for AS3525v2 No SDSLOT frequency,
Showed IDE freq though it is unused
Added: DBOP and SSP underclocking affects display on v1/v2 respectively
Fixed: debug menu now has SSP frequency, and SSP_CPSR
Update: made settings menu more generic
Update: cleaned up code
Added: Clip v1 & Fuze v1 didn't have HAVE_ADJUSTABLE_CPU_VOLTAGE.
not sure why but, waiting on testing to confirm
Added: C200v2 and E200v2 devices and HAVE_ADJUSTABLE_CPU_VOLTAGE.
Fixed: v1 devices don't like display timing set lower (dbop)
v1 devices don't have a divider set for ssp (causes divide by 0)
Fixed: ClipZip display lags with Max SSP divider changed from 0xFE to 0x32
Fixed: v1 devices didn't work properly with highspeed sd cards
Added code from http://gerrit.rockbox.org/r/#/c/1704/
Added powersave and IDE interface enable/disable
Added: V2 devices now have powersave enabled on sd interface
Update: cleaned up code, lang defines, added manual entries
Update ssp clock mechanism added calculated ssp divider to clipzip
Update turn display clock off when clip+ turns off display
Fixed: clipzip wrong register for SSP clock
Change-Id: I04137682243be92f0f8d8bf1cfa54fbb1965559b
TODO: add other players?
Saves 100+ bytes (50 of it in iram), saves a bit of power
Internal LCD clock decreased but with added efficiency of drawing routines
loses only around 2 Hz on the scanrate (~75Hz) while fps is slightly increased
Column offsets are now calculated outside the loops saving a few instructions
Passing a LCD_NOP command after lcd_update turns off Data/Cmd# gpio
saving a bit more power
Added a function lcd_write_cmd_triple() that allows 3 commands to be sent at once
when enabled with LCD_USE_FIFO_FOR_COMMANDS it sends them back to back without
checking FIFO status in between or sending to thhe D/C# Gpio.
Makes an assumption about the FIFO being large enough to
accept 3 commands after being emptied which should be the case on the
clipv1, clipv2, clipplus. I have only enabled it for the clip plus
as thats the only device I have to test it on.
On clip+ the SSP clock is now turned off when screen is off
Change-Id: Ib5fd24697bfe4ac8b8ee017361e789e4a7910d21
On the clip zip most debug menu items get cut off and there is
no way to read most of the debug menu items.
This patch makes the menu button scroll the text 1 character
to the right with each press and the center (select) button
re-aligns the text
Adds SSP frequency(v2) & register
Adds SD slot frequency(v2)
Change-Id: If4705d6790e25061931ca654062e22fc2e0a6f16
I2c controller needs to be enabled in order to read CSPR0, CSPR1
registers function sets CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE
and only clears if it wasn't previously enabled
Use divider set in register to calculate frequency rather than
hard coded divider
Change-Id: I54ecc0c1859e906c00f4c2ae8ae2424a4619df98
Also removes the sd_enable() function call. It was only used in
the debug screen on AMSv1 and not used at all on AMS v2.
For v1,obtain debug info in a struture passed to a dedicated
debug info function so that enabling and disabling the controller
isn't racy.
Change-Id: I7c44693bc2df5a1f16168b05b3abfe622f9584ce
Lcd_update rect was hanging during horizontal screen update x = 238 and width = 2
which was within the bounds of the screen, this seems to be a weird corner case
but more testing needs done.
Update_rect now properly bounded between 0 - screen w/h
--Cleaned up code
Pixels in x are now multiples of 4.
Datasheet states:
-------------------------------------------------------------------------------------------
WORD_LENGTH=0 implies the input frame buffer is RGB 16 bits per pixel.
DATA_FORMAT_16_BIT field indicates if the pixels are in RGB 555 or RGB 565 format.
Limitations:
— BYTE_PACKING_FORMAT [3:0] should be 0x3 or 0xC if there is only one pixel per word.
— If there are two pixels per word, BYTE_PACKING_FORMAT [3:0] should be 0xF and
H_COUNT will be restricted to be a multiple of 2 pixels.
and
WORD_LENGTH=3 indicates that the input frame-buffer is RGB 24 bits per pixel (RGB 888). If
BYTE_PACKING_FORMAT [3:0] is 0x7, it indicates that there is only one pixel per 32-bit word
and there is no restriction on H_COUNT.
Limitations:
— If BYTE_PACKING_FORMAT [3:0] is 0xF, it indicates that the pixels are packed, i.e. there
are 4 pixels in 3 words or 12 bytes. In that case, H_COUNT must be a multiple of 4 pixels.
-------------------------------------------------------------------------------------------
We are using 16 bits per pixel and byte_packing = 0xF but device crashes with multiple of 2 pixels
Behaviour can be verified with plugin - oscilloscope, Horizontal mode device hangs as indicator
reaches right of screen
Change-Id: I1445f5334f4e7fe59304c65c76b47d0daa0614b2
Windows now ignores the hidden flag, so just nullify the entries
to hide depending upon whether or not bootloader install mode is
activated.
Change-Id: I00d0797e40ea3b5f5d5d8e1243b50cfcdd029bb4
Instead of checking ticks, set a sticky dirty flag that indicates
that the RTC needs to be read. This gives a timely update and more
accurate readout without actually reading the RTC until it changes.
The implementation should atomically read the flag and clear it.
Setting the flag would typically happen in an RTC tick ISR.
Change-Id: I6fd325f22845029a485c502c884812d3676026ea
New support as well as some buggy support fixed.
Still no floating point support if ever that would be desired.
Support (*):
* Flags: '-', '+', ' ', '#', '0'
* Width and precision: 'n', '.n', '*' and '.*'
* Length modifiers: 'hh', 'h', 'j', 'l', 'll', 't', 'z'
* Radix: 'c', 'd', 'i', 'n', 'o', 'p/P', 's', 'u', 'x/X'
(*) Provision exists to switch lesser-used stuff on or off or when
certain functionality isn't desired (bootloader?). The compulsory
radixes are everything but 'o', 'n', 'p/P' and 'x/X' with length
modifiers being optional. The default setup is 'l', 'z', 'c', 'd',
'p/P', 's', 'u', 'x/X'.
* Move fdprintf() to its own file. It was in a strange place.
* Make callers compatible and fix a couple snprintf() bugs while
at it.
Could smush it down in size but I'm gonna get over the binsize
neurosis and just the let optimizer do its thing.
Change-Id: Ibdc613a9b6775802c188b29b9dd46c568c94f7c3
At normal loads:
- disabling auto slow boosts performance at the cost of runtime (~ -5%)
- disabling at max cpu does not noticibly decrease runtime
Change-Id: I5de80201c9a24ce556862151cbd6b21b01708b63
Adds boot data to as3525 devices Sansa C200v2 E200v2 Clip Clipv2 Clip+ ClipZip
fuze, fuzev2 m200v4
Adds boot_data to features.txt
default arm crt0.s now had boot data if HAVE_BOOTDATA is defined
Change-Id: I614a556696540511a69fc12a4520b01c268bf8a9
Bootdata is a special location in the Firmware marked by a magic header
The bootloader is able to copy information to the firmware by locating
this struct and passing data to the firmware when it is loaded but
before it is actually executed
Data is verified by a crc of the bootdata
Change-Id: Ib3d78cc0c3a9d47d6fe73be4747a11b7ad6f0a9e
