- Some rewrite with the intent to get ride of these random errors
appearing on some builds/devices (not much noticeable on RB but
can ruin bootloader builds).
- Error handling (ACK).
- IIC clock increased to be the same as in OF.
Change-Id: Idf8cfa3c230a0a61ec9c879bf6f0ea8b061a4607
Add code to read USB D+/D- and accessory ADCs, it is shown in HW
debug menu, might be useful in future for RB and/or the bootloader
to identify external USB chargers.
Change-Id: Ia48ca5e06bb7ddc52bb55abedde6734653ce8dba
Based on g#844 and g#949, it is intended as a replacement for the
current s3c6400x USB driver.
The DesignWare USB OTG core is integrated into many SoC's, however
HW core version and capabilities (mainly DMA mode, Tx FIFO mode,
FIFO size and number of available IN/OUT endpoins) may differ:
CPU targets HW ver DMA NPTX FIFO FIFO sz #IN/OUT
-------- ------------- ------ --- --------- ------- -------
as3525v2 sansaclipplus 2.60a Yes Dedicated 0x535 4/4
sansaclipv2
sansaclipzip
sansafuzev2
s5l8701 ipodnano2g 2.20a Yes Shared 0x500 4/5
s5l8702 ipod6g 2.60a Yes Dedicated 0x820 7/7
ipodnano3g
s5l8720 ipodnano4g ? ? ? ? ?
Functionality supported by this driver:
- Device mode, compatible with USB 1.1/2.0 hosts.
- Shared FIFO (USB_DW_SHARED_FIFO) or dedicated FIFOs.
- No DMA (USB_DW_ARCH_SLAVE) or internal DMA mode.
- Concurrent transfers: control, bulk (usb_storage, usb_serial) and
interrupt (usb_hid).
Actually this driver is not used by any CPU, it will be enabled for
each individual CPU/target in next patches.
Change-Id: I74a1e836d18927a31f6977d71115fb442477dd5f
The old driver was bad in many respect, it had some race conditions, it was
using a thread to serialize transfers because of the legacy i2c interface.
It also had huge latency (typically 50ms but delays up to 300ms can happen),
thus some presses were missed.
The new driver takes advantage of the new i2c driver to do everything
asynchronously. It also does not need a thread anymore because queueing
ensures proper serialization. It provides much better and reliable latency
(typically ~2ms).
Also fix the debug screen which was horribly broken. The new screen also
displays the deadzones.
Change-Id: I69b7f99b75053e6b1d3d56beb4453c004fd2076e
PMU interrupts are used to detect USB Vbus, wall adaptor, accessories
and holdswitch. A thread is needed to poll the PMU throught I2C, ATM
it does nothing but showing the state of the inputs on the HW debug
menu, funcionallity for each individual input will be added in next
patches.
Change-Id: If93bf2044d1052729237a7fd1431c8493e09f1c7
Do not rely on a bootloader initializing the HW, RB initializes
and configures GPIO, I2C, and PMU at startup.
Change-Id: If7f856b1f345f63de584aa4e4fc22d130cd66c80
When the bootloader starts, most of HW never has been initialized.
This patch includes all code needed to perform the preliminary
initialization on SYSCON, GPIO, i2c, and MIU.
The code is based on emCORE and OF reverse engineering, ported to
C for readability.
Change-Id: I9ecf2c3e8b1b636241a211dbba8735137accd05c
The write buffer size is undefined to use the default 24Kb. size
defined (and recomended) in usb_storage.c, the read buffer size is
also decremented to 24 Kb. USB sequential read and write benchmarks
using diskdump are now 8-9% faster.
Change-Id: Ia7c9f77b57c8ca5b566b508efffbd713d1587acf
When the bootloader starts only IRAM is available, the first task is to
ask the PMU to verify if the iPod has previously been hibernated by OF.
Due to memory limitations, the kernel cannot be used on this stage.
This patch modifies I2C and PMU low level functions to not to depend
on kernel (removes mutexes, and uses HW timer instead of current_tick),
actual kernel functions are modified to be 'mutexed' wrappers of the new
functions.
Change-Id: I7cef9e95dedaf176dc0659315f3dc33166d5b116
Add UART support for s5l8700/1 using the UC870X UART controller,
actually the functionallity is disabled and must be enabled for
each individual target. Tested on iPod Nano 2G (s5l8701), not
tested on s5l8700.
Change-Id: Ic0f216bb871502d355a70e4b658e536a2c0976a9
- Small rework on the UC8702 UART controller to make it compatible with
other s5l870x SOCs. Files moved and renamed, many conditional code
added to deal with capabilities and 'features' of the different CPUs.
- A couple of optimizacions that should not affect the functionality.
Change-Id: I705169f7e8b18d5d1da642f81ffc31c4089780a6
With this changes rockbox can be loaded from SD card when internal storage
can't be mount (due to hardware or software problem).
Change-Id: I32b20d3f341566364def747a708a54ba6b4a7f8b
Interrupts version is cause of freeze on USB extraction.
Also non-interrupts version much simpler and faster.
Change-Id: I30a2993cdcaa85abfba77ca06bfacd5b6b4353e2
Fix log file corruption if we have new messages at dumping log to file. Comment
removed as it incorrect. We store all messages in direct order (last message at
end of file).
Change-Id: I4acfa8a0935cc41a889e08f6bc42974fefd1ade2
Voltage is reduced when the CPU is unboosted, resulting in a large
reduction in power consumption. In analogy with the AMSv1 voltage
scaling code (currently disabled due to problems with SD cards),
I have defined a config file option to enable/disable it.
Change-Id: Ia89c31ec06dd012354b4d53435e7b5b36243b206
- Add description for attributes supported by Samsung HS081HA (80Gb)
and HS161JQ (CEATA 160Gb).
- Show error code when ata_read_smart() fails.
Change-Id: I618cc4f37d139fc90f596e2cf3a751346b27deb6
After previous commit 0b6647f2e9
this alignment should not be needed, but not sure at all, so it
is aligned to cache line length for safety.
Change-Id: I5b2b9a30c913d2a609acc1bdf30bdec6811a2551
Some old code made the assumption that CONFIG_CPU == AS3525v2 if and only if
HAVE_AS3543, which is not true on targets like the Samsung YP-R0. This fixes
several issues on such targets like a huge volume gap between -39dB and -40dB
and a volume artificially capped at -72dB instead of -82dB.
Change-Id: Ib1c883ac593c0c3ce5e2bf4eb408924ce5f5ad93
seems more logical to me, and is more consistent, since
"SAMSUNG_YH92X_PAD" is already used in the tex files.
Change-Id: Ie9a9d850ea86155a7dcf86c88a22a420a10a3837
Voltage scaling is not yet enabled, but will follow once we are sure
these changes are stable. Preliminary testing suggests a large
increase in battery life, which will be further improved by voltage
scaling. Patch by Mihail Zenkov with help from myself and others on
the forums.
Change-Id: I171d20bbee19a48c13cd14efb0d023883cc8c687
Configures uncached memory region and adds some defines for misc HW,
for compability with the bootloader and other future use, current
functionality should not be affected.
Change-Id: I390e79bea1aef5b10dfbc72ad327d7fe438ec6f5
This is a rewrite of the clocking section, the resulting system
frequencies are the same as the current git version.
This pàtch uses fixed FClk and just one register is written to switch
all system frequencies, it needs less steps than the current git
version to reach the desired frequency, so it is faster and safer.
Includes functions to step-up/down over a table of predefined set of
frequencies.
The major difference is that Vcore is decreased from 1050 to 1000 mV.
See clocking-s5l8702.h for more information.
Change-Id: I58ac6634e1996adbe1c0c0918a7ce94ad1917d8e
Adds ata_read_smart() function to storage ATA driver, current
SMART data can be displayed and optionally written to hard
disk using System->Debug menu.
Change-Id: Ie8817bb311d5d956df2f0fbfaf554e2d53e89a93
