Better be safe than sorry, don't try to read/write outside our storage,
because we might overwrite the OF on the internal storage
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26077 a1c6a512-1295-4272-9138-f99709370657
it would still flash when the light was off
it turns out that if B5 is set to input the light can't be turned on
but we can still select between µSD slot and internal storage
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26059 a1c6a512-1295-4272-9138-f99709370657
adjust logical starting sector to physical starting sector after the check
number of blocks is already adjusted from physical to logical
don't panic anymore when accessing the last part of storage
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26050 a1c6a512-1295-4272-9138-f99709370657
The OF does this and while we don't have the documentation to be sure I think it's highly likely this is a low power mode referred to in one of the product "briefs".
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25936 a1c6a512-1295-4272-9138-f99709370657
This seems to make switching the uSD card to high speed timing much more reliable.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25935 a1c6a512-1295-4272-9138-f99709370657
Some SD cards were having problems switching to 4 Bit widebus and this solution appears to remedy that.
Thanks to Luca_S!
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25846 a1c6a512-1295-4272-9138-f99709370657
These INT's shouldn't be unmasked until the transfer is just about to happen.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25836 a1c6a512-1295-4272-9138-f99709370657
Change SD_SELECT/DESELECT_CARD commands to MCI_NO_RESP as we don't need a response here.
Renumber some command errors.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25811 a1c6a512-1295-4272-9138-f99709370657
Also enable write support, test_disk passes on all targets
Flyspray: FS#11140
Authors: Jack Halpin and myself
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25799 a1c6a512-1295-4272-9138-f99709370657
Use it in fuzev2 to improve some big delays (correct the biggest one to actually wait for the fifo to empty), and use it in the sd drivers.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25734 a1c6a512-1295-4272-9138-f99709370657
Before the clock settings were fixed this setting actually caused the problem it now seems to solve.
Random freezups seem to be gone for clip+ at least.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25531 a1c6a512-1295-4272-9138-f99709370657
We only use DMA transfers so we should not need to change/reset the FIFO configuration.
Also add comment showing what we set as the TX/RX watermarks.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25507 a1c6a512-1295-4272-9138-f99709370657
XPD was being switched between SD-MMC interface and general i/o functions in the sd_enable() function similar to as3525v1.
Since the as3525v2's do not seem to use XPD as general i/o there's no need to switch it back.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25497 a1c6a512-1295-4272-9138-f99709370657
I have also made the CMD_CHECK_CRC_BIT unused for now since we do not check any response crc values yet.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25343 a1c6a512-1295-4272-9138-f99709370657
The internal card does not appear to be HS capable, at least not in 2GB clip+
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25316 a1c6a512-1295-4272-9138-f99709370657
The controller only needs to be reset if we had an error to clean up any leftover trash...
Move comment pertaining to retry variable so it's actually nearby.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25315 a1c6a512-1295-4272-9138-f99709370657
Adjust the initial MCI_MASK value to also mask the MCI_INT_RXDR and MCI_INT_TXDR bits as it seems we don't use them for dma transfers.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25314 a1c6a512-1295-4272-9138-f99709370657
Move CLKDIV macros into clock-target.h.
Only enable the necessary interfaces for the 3 clock registers used for SD.
Add MEMSTICK and SDSLOT registers to bottom of register display in View HW info debug page.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25309 a1c6a512-1295-4272-9138-f99709370657
We don't need the post transfer call this way. We check on TRAN state before each partial transfer.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25282 a1c6a512-1295-4272-9138-f99709370657
Especially when using caches we might read the response too fast and get
the response for the previous command instead.
Now Clip+ boots fine with both instruction & data caches enabled, the
delay might need to be lowered though: boot time is a bit longer.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25183 a1c6a512-1295-4272-9138-f99709370657
SD_ALL_SEND_CID was using cardinfo.cid to store the response instead of the temp array used for long responses.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24944 a1c6a512-1295-4272-9138-f99709370657
Remove MCI_HCON read from init_controller() as it now appears unneccesary.
Make sd-init_card() use similar init sequence to the one in sd-as3525.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24903 a1c6a512-1295-4272-9138-f99709370657
I've left in some commented out code for now as this is still a bit experimental.....
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24891 a1c6a512-1295-4272-9138-f99709370657
