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SansaAMSv2: Give register CGU_BASE + 0x3C the name CGU_SDSLOT.

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Move CLKDIV macros into clock-target.h.
Only enable the necessary interfaces for the 3 clock registers used for SD.
Add MEMSTICK and SDSLOT registers to bottom of register display in View HW info debug page.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25309 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jack Halpin 2010-03-23 17:00:59 +00:00
parent 2d174af443
commit 19fc7297ba
4 changed files with 19 additions and 9 deletions
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2
firmware/export/as3525v2.h
View file

@ -32,4 +32,6 @@
#undef IRAM_SIZE
#define IRAM_SIZE 0x100000
#define CGU_SDSLOT (*(volatile unsigned long *)(CGU_BASE + 0x3C))
#endif /* __AS3525V2_H__ */

5
firmware/target/arm/as3525/clock-target.h
View file

@ -156,7 +156,10 @@
#define AS3525_IDE_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1)/*div=1/(n+1)*/
#if CONFIG_CPU == AS3525v2
#define AS3525_MS_FREQ 120000000
#define AS3525_MS_FREQ 120000000
#define AS3525_MS_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_MS_FREQ) -1)
#define AS3525_SDSLOT_FREQ 24000000
#define AS3525_SDSLOT_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_SDSLOT_FREQ) -1)
#define AS3525_IDE_FREQ 80000000
#else
#define AS3525_IDE_FREQ 50000000 /* The OF uses 66MHz maximal freq */

3
firmware/target/arm/as3525/debug-as3525.c
View file

@ -380,6 +380,9 @@ bool __dbg_hw_info(void)
#if CONFIG_CPU == AS3525
lcd_putsf(0, line++, "MCI_NAND :%8x", (unsigned int)(MCI_NAND));
lcd_putsf(0, line++, "MCI_SD :%8x", (unsigned int)(MCI_SD));
#else
lcd_putsf(0, line++, "CGU_MEMSTK:%8x", (unsigned int)(CGU_MEMSTICK));
lcd_putsf(0, line++, "CGU_SDSLOT:%8x", (unsigned int)(CGU_SDSLOT));
#endif
lcd_update();

18
firmware/target/arm/as3525/sd-as3525v2.c
View file

@ -641,18 +641,20 @@ static void init_controller(void)
int sd_init(void)
{
int ret;
CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
CGU_IDE = (1<<7) /* AHB interface enable */ |
(1<<6) /* interface enable */ |
((CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1) << 2) |
1; /* clock source = PLLA */
CGU_IDE = (1<<7) /* AHB interface enable */
| (AS3525_IDE_DIV << 2)
| 1; /* clock source = PLLA */
CGU_MEMSTICK = (1<<8) | (1<<7) |
((CLK_DIV(AS3525_PLLA_FREQ, AS3525_MS_FREQ) -1) << 2) | 1;
CGU_MEMSTICK = (1<<7) /* interface enable */
| (AS3525_MS_DIV << 2)
| 1; /* clock source = PLLA */
*(volatile int*)(CGU_BASE+0x3C) = (1<<7) |
(CLK_DIV(AS3525_PLLA_FREQ, 24000000) -1)<<2 | 1;
CGU_SDSLOT = (1<<7) /* interface enable */
| (AS3525_SDSLOT_DIV << 2)
| 1; /* clock source = PLLA */
wakeup_init(&transfer_completion_signal);