2008-01-14 22:04:48 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 Rob Purchase
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*
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2008-06-28 18:10:04 +00:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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2008-01-14 22:04:48 +00:00
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __TCC780X_H__
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#define __TCC780X_H__
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2010-11-19 07:17:20 +00:00
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#define CACHEALIGN_BITS (5)
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2009-09-01 21:35:37 +00:00
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#define TTB_SIZE (0x4000)
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/* must be 16Kb (0x4000) aligned */
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#define TTB_BASE_ADDR (0x20000000 + (MEMORYSIZE*1024*1024) - TTB_SIZE)
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#define TTB_BASE ((unsigned long *)TTB_BASE_ADDR) /* End of memory */
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2008-01-14 22:04:48 +00:00
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/* General-purpose IO */
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#define PORTCFG0 (*(volatile unsigned long *)0xF005A000)
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#define PORTCFG1 (*(volatile unsigned long *)0xF005A004)
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#define PORTCFG2 (*(volatile unsigned long *)0xF005A008)
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#define PORTCFG3 (*(volatile unsigned long *)0xF005A00C)
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#define GPIOA (*(volatile unsigned long *)0xF005A020)
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#define GPIOB (*(volatile unsigned long *)0xF005A040)
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#define GPIOC (*(volatile unsigned long *)0xF005A060)
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#define GPIOD (*(volatile unsigned long *)0xF005A080)
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#define GPIOE (*(volatile unsigned long *)0xF005A0A0)
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#define GPIOA_DIR (*(volatile unsigned long *)0xF005A024)
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#define GPIOB_DIR (*(volatile unsigned long *)0xF005A044)
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#define GPIOC_DIR (*(volatile unsigned long *)0xF005A064)
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#define GPIOD_DIR (*(volatile unsigned long *)0xF005A084)
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#define GPIOE_DIR (*(volatile unsigned long *)0xF005A0A4)
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#define GPIOA_SET (*(volatile unsigned long *)0xF005A028)
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#define GPIOB_SET (*(volatile unsigned long *)0xF005A048)
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#define GPIOC_SET (*(volatile unsigned long *)0xF005A068)
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#define GPIOD_SET (*(volatile unsigned long *)0xF005A088)
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#define GPIOE_SET (*(volatile unsigned long *)0xF005A0A8)
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#define GPIOA_CLEAR (*(volatile unsigned long *)0xF005A02C)
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#define GPIOB_CLEAR (*(volatile unsigned long *)0xF005A04C)
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#define GPIOC_CLEAR (*(volatile unsigned long *)0xF005A06C)
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#define GPIOD_CLEAR (*(volatile unsigned long *)0xF005A08C)
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#define GPIOE_CLEAR (*(volatile unsigned long *)0xF005A0AC)
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/* Clock Generator */
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#define CLKCTRL (*(volatile unsigned long *)0xF3000000)
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#define PLL0CFG (*(volatile unsigned long *)0xF3000004)
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#define PLL1CFG (*(volatile unsigned long *)0xF3000008)
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#define CLKDIVC (*(volatile unsigned long *)0xF300000C)
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#define CLKDIVC1 (*(volatile unsigned long *)0xF3000010)
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#define MODECTR (*(volatile unsigned long *)0xF3000014)
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#define BCLKCTR (*(volatile unsigned long *)0xF3000018)
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#define SWRESET (*(volatile unsigned long *)0xF300001C)
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#define PCLKCFG0 (*(volatile unsigned long *)0xF3000020)
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2009-07-19 17:31:56 +00:00
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#define PCLK_SDMMC (*(volatile unsigned long *)0xF3000024)
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2008-01-14 22:04:48 +00:00
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#define PCLKCFG2 (*(volatile unsigned long *)0xF3000028)
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#define PCLKCFG3 (*(volatile unsigned long *)0xF300002C)
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#define PCLK_LCD (*(volatile unsigned long *)0xF3000030)
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#define PCLKCFG5 (*(volatile unsigned long *)0xF3000034)
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#define PCLKCFG6 (*(volatile unsigned long *)0xF3000038)
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#define PCLKCFG7 (*(volatile unsigned long *)0xF300003C)
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#define PCLKCFG8 (*(volatile unsigned long *)0xF3000040)
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#define PCLK_TCT (*(volatile unsigned long *)0xF3000044)
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#define PCLKCFG10 (*(volatile unsigned long *)0xF3000048)
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#define PCLKCFG11 (*(volatile unsigned long *)0xF300004C)
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#define PCLK_ADC (*(volatile unsigned long *)0xF3000050)
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2008-04-21 20:16:18 +00:00
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#define PCLK_DAI (*(volatile unsigned long *)0xF3000054)
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2008-01-14 22:04:48 +00:00
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#define PCLKCFG14 (*(volatile unsigned long *)0xF3000058)
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#define PCLK_RFREQ (*(volatile unsigned long *)0xF300005C)
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#define PCLKCFG16 (*(volatile unsigned long *)0xF3000060)
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#define PCLKCFG17 (*(volatile unsigned long *)0xF3000064)
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#define PCK_EN (1<<28)
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#define CKSEL_PLL0 0
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#define CKSEL_PLL1 1
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#define CKSEL_XIN 4
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2008-01-25 21:37:59 +00:00
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/* Device bits for SWRESET & BCLKCTR */
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2008-09-22 19:27:21 +00:00
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#define DEV_USBD (1<<1)
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2008-01-25 21:37:59 +00:00
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#define DEV_LCDC (1<<2)
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#define DEV_SDMMC (1<<6)
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#define DEV_NAND (1<<9)
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#define DEV_DAI (1<<14)
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#define DEV_ECC (1<<16)
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#define DEV_RTC (1<<21)
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#define DEV_SDRAM (1<<22)
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#define DEV_COP (1<<23)
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#define DEV_ADC (1<<24)
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#define DEV_TIMER (1<<26)
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#define DEV_CPU (1<<27)
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#define DEV_IRQ (1<<28)
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#define DEV_MAIN (1<<31)
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2008-01-14 22:04:48 +00:00
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/* IRQ Controller */
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#define IEN (*(volatile unsigned long *)0xF3001000)
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#define CREQ (*(volatile unsigned long *)0xF3001004)
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#define IRQSEL (*(volatile unsigned long *)0xF300100C)
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#define MREQ (*(volatile unsigned long *)0xF3001014)
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2008-03-22 19:41:51 +00:00
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#define POL (*(volatile unsigned long *)0xF300101C)
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2008-01-14 22:04:48 +00:00
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#define MIRQ (*(volatile unsigned long *)0xF3001028)
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#define MFIQ (*(volatile unsigned long *)0xF300102C)
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2008-09-22 19:27:21 +00:00
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#define TMODE (*(volatile unsigned long *)0xF3001030)
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2009-07-19 17:31:56 +00:00
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#define TMODEA (*(volatile unsigned long *)0xF300103C)
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2008-01-14 22:04:48 +00:00
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#define ALLMASK (*(volatile unsigned long *)0xF3001044)
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#define VAIRQ (*(volatile unsigned long *)0xF3001080)
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#define VAFIQ (*(volatile unsigned long *)0xF3001084)
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#define VNIRQ (*(volatile unsigned long *)0xF3001088)
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#define VNFIQ (*(volatile unsigned long *)0xF300108C)
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2008-03-22 19:41:51 +00:00
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#define VCTRL (*(volatile unsigned long *)0xF3001090)
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2008-01-14 22:04:48 +00:00
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2008-03-22 19:41:51 +00:00
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#define IRQ_PRIORITY_TABLE ((volatile unsigned int *)0xF30010A0)
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2009-07-19 17:31:56 +00:00
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#define EXT0_IRQ_MASK (1<<0)
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2008-04-12 18:17:15 +00:00
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#define EXT3_IRQ_MASK (1<<3)
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2008-03-22 19:41:51 +00:00
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#define TIMER0_IRQ_MASK (1<<6)
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#define DAI_RX_IRQ_MASK (1<<14)
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#define DAI_TX_IRQ_MASK (1<<15)
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2008-09-22 19:27:21 +00:00
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#define USBD_IRQ_MASK (1<<21)
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2008-04-04 23:43:31 +00:00
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#define ADC_IRQ_MASK (1<<30)
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2008-01-14 22:04:48 +00:00
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/* Timer / Counters */
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2009-03-30 21:15:15 +00:00
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/* Note: Timers 0-3 have a 16 bit counter, 4-5 have 20 bits */
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#define TCFG(_x_) (*(volatile unsigned int *)(0xF3003000+0x10*(_x_)))
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#define TCNT(_x_) (*(volatile unsigned int *)(0xF3003004+0x10*(_x_)))
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#define TREF(_x_) (*(volatile unsigned int *)(0xF3003008+0x10*(_x_)))
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#define TIREQ (*(volatile unsigned long *)0xF3003060)
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/* TCFG flags */
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#define TCFG_EN (1<<0) /* enable timer */
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#define TCFG_CONT (1<<1) /* continue from zero once TREF is reached */
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#define TCFG_PWM (1<<2) /* PWM mode */
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#define TCFG_IEN (1<<3) /* IRQ enable */
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#define TCFG_SEL (1<<4) /* clock source & divider */
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#define TCFG_POL (1<<7) /* polarity */
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#define TCFG_CLEAR (1<<8) /* reset TCNT to zero */
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#define TCFG_STOP (1<<9) /* stop counting once TREF reached */
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2008-01-25 21:37:59 +00:00
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/* TIREQ flags */
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2009-03-30 21:15:15 +00:00
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#define TIREQ_TI0 (1<<0) /* Timer N IRQ flag */
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#define TIREQ_TI1 (1<<1)
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#define TIREQ_TI2 (1<<2)
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#define TIREQ_TI3 (1<<3)
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#define TIREQ_TI4 (1<<4)
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#define TIREQ_TI5 (1<<5)
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#define TIREQ_TF0 (1<<8) /* Timer N reference value reached */
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#define TIREQ_TF1 (1<<9)
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#define TIREQ_TF2 (1<<10)
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#define TIREQ_TF3 (1<<11)
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#define TIREQ_TF4 (1<<12)
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#define TIREQ_TF5 (1<<13)
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2008-01-14 22:04:48 +00:00
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#define TC32EN (*(volatile unsigned long *)0xF3003080)
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#define TC32LDV (*(volatile unsigned long *)0xF3003084)
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#define TC32MCNT (*(volatile unsigned long *)0xF3003094)
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#define TC32IRQ (*(volatile unsigned long *)0xF3003098)
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/* ADC */
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#define ADCCON (*(volatile unsigned long *)0xF3004000)
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#define ADCDATA (*(volatile unsigned long *)0xF3004004)
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#define ADCCONA (*(volatile unsigned long *)0xF3004080)
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#define ADCSTATUS (*(volatile unsigned long *)0xF3004084)
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#define ADCCFG (*(volatile unsigned long *)0xF3004088)
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/* Memory Controller */
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#define SDCFG (*(volatile unsigned long *)0xF1000000)
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#define SDFSM (*(volatile unsigned long *)0xF1000004)
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#define MCFG (*(volatile unsigned long *)0xF1000008)
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#define CSCFG0 (*(volatile unsigned long *)0xF1000010)
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#define CSCFG1 (*(volatile unsigned long *)0xF1000014)
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#define CSCFG2 (*(volatile unsigned long *)0xF1000018)
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#define CSCFG3 (*(volatile unsigned long *)0xF100001C)
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#define CLKCFG (*(volatile unsigned long *)0xF1000020)
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#define SDCMD (*(volatile unsigned long *)0xF1000024)
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#define SDCFG1 (*(volatile unsigned long *)0xF1001000)
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#define MCFG1 (*(volatile unsigned long *)0xF1001008)
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2008-04-21 20:16:18 +00:00
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/* DAI */
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#define DADO_L0 (*(volatile unsigned long *)0xF0059020)
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#define DADO_R0 (*(volatile unsigned long *)0xF0059024)
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#define DADO_L1 (*(volatile unsigned long *)0xF0059028)
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#define DADO_R1 (*(volatile unsigned long *)0xF005902c)
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#define DADO_L2 (*(volatile unsigned long *)0xF0059030)
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#define DADO_R2 (*(volatile unsigned long *)0xF0059034)
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#define DADO_L3 (*(volatile unsigned long *)0xF0059038)
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#define DADO_R3 (*(volatile unsigned long *)0xF005903c)
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#define DADO_L(_x_) (*(volatile unsigned int *)(0xF0059020+8*(_x_)))
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#define DADO_R(_x_) (*(volatile unsigned int *)(0xF0059024+8*(_x_)))
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#define DAMR (*(volatile unsigned long *)0xF0059040)
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#define DAVC (*(volatile unsigned long *)0xF0059044)
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2008-01-14 22:04:48 +00:00
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/* Misc */
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#define ECFG0 (*(volatile unsigned long *)0xF300500C)
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#define MBCFG (*(volatile unsigned long *)0xF3005020)
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#define TCC780_VER (*(volatile unsigned long *)0xE0001FFC)
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2008-07-12 23:01:49 +00:00
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/* NAND Flash Controller */
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#define NFC_CMD (*(volatile unsigned long *)0xF0053000)
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#define NFC_SADDR (*(volatile unsigned long *)0xF005300C)
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#define NFC_SDATA (*(volatile unsigned long *)0xF0053040)
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#define NFC_WDATA (*(volatile unsigned long *)0xF0053010)
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#define NFC_CTRL (*(volatile unsigned long *)0xF0053050)
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#define NFC_16BIT (1<<26)
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#define NFC_CS0 (1<<23)
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#define NFC_CS1 (1<<22)
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#define NFC_READY (1<<20)
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#define NFC_IREQ (*(volatile unsigned long *)0xF0053060)
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#define NFC_RST (*(volatile unsigned long *)0xF0053064)
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/* ECC Controller */
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2009-08-12 19:26:04 +00:00
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#define ECC_CTRL (*(volatile unsigned long *)0xF005B000)
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#define ECC_ENC (1<<27)
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#define ECC_READY (1<<26)
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#define ECC_M4EN (1<<6)
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#define ECC_BASE (*(volatile unsigned long *)0xF005B004)
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#define ECC_CLR (*(volatile unsigned long *)0xF005B00C)
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#define MLC_ECC0W (*(volatile unsigned long *)0xF005B030)
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#define MLC_ECC1W (*(volatile unsigned long *)0xF005B034)
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#define MLC_ECC2W (*(volatile unsigned long *)0xF005B038)
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#define ECC_ERRADDR(x) (*(volatile unsigned long *)(0xF005B050+4*(x)))
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#define ECC_ERRDATA(x) (*(volatile unsigned long *)(0xF005B060+4*(x)))
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#define ECC_ERR_NUM (*(volatile unsigned long *)0xF005B070)
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2008-07-12 23:01:49 +00:00
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2009-07-19 17:31:56 +00:00
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/* SD/MMC Controller */
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#define SDICLK (*(volatile unsigned long *)0xF0058004)
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#define SDIARGU (*(volatile unsigned long *)0xF0058008)
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#define SDICMD (*(volatile unsigned long *)0xF005800C)
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#define SDIRSPCMD (*(volatile unsigned long *)0xF0058010)
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#define SDIRSPARGU0 (*(volatile unsigned long *)0xF0058014)
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#define SDIRSPARGU1 (*(volatile unsigned long *)0xF0058018)
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#define SDIRSPARGU2 (*(volatile unsigned long *)0xF005801C)
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#define SDIRSPARGU3 (*(volatile unsigned long *)0xF0058020)
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#define SDIDTIMER (*(volatile unsigned long *)0xF0058024)
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#define SDIDCTRL2 (*(volatile unsigned long *)0xF0058028)
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#define SDIDCTRL (*(volatile unsigned long *)0xF005802C)
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#define SDISTATUS (*(volatile unsigned long *)0xF0058030)
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#define SDIIFLAG (*(volatile unsigned long *)0xF0058034)
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#define SDIWDATA (*(volatile unsigned long *)0xF0058038)
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#define SDIRDATA (*(volatile unsigned long *)0xF005803C)
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#define SDIIENABLE (*(volatile unsigned long *)0xF0058040)
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#define SDICMD_RES_TYPE1 1
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#define SDICMD_RES_TYPE1b 2
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#define SDICMD_RES_TYPE2 3
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#define SDICMD_RES_TYPE3 4
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#define SDICMD_RES_TYPE4 5
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#define SDICMD_RES_TYPE5 6
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#define SDICMD_RES_TYPE6 7
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#define SDISTATUS_RESP_RCVD (1<<7)
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#define SDISTATUS_FIFO_LOAD_REQ (1<<17)
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#define SDISTATUS_FIFO_FETCH_REQ (1<<18)
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#define SDISTATUS_CMD_PATH_RDY (1<<21)
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#define SDISTATUS_MULTIBLOCK_END (1<<25)
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2008-09-22 18:49:37 +00:00
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/* USB 2.0 device system MMR base address */
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#define USB_BASE 0xf0010000
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2009-03-09 22:02:30 +00:00
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#define USB_NUM_ENDPOINTS 3
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#define USB_DEVBSS_ATTR IBSS_ATTR
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2009-06-29 14:30:12 +00:00
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/* Timer frequency */
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/* Timer is based on PCK_TCT (set to 2Mhz in system.c) */
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#define TIMER_FREQ (2000000)
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2008-01-14 22:04:48 +00:00
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#endif
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