Make the TCC780x NAND driver also build for 77x targets. This is work-in-progress stuff and does not yet work fully on 77x, but it's a step in the right direction. Also replace some magic numbers with #defines.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18019 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
parent
6e4aab0fe9
commit
ee72b3bbc6
8 changed files with 152 additions and 165 deletions
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@ -956,8 +956,8 @@ target/arm/pnx0101/pcm-pnx0101.c
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#ifdef LOGIK_DAX
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#ifndef SIMULATOR
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target/arm/ata-nand-telechips.c
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target/arm/tcc77x/adc-tcc77x.c
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target/arm/tcc77x/ata-nand-tcc77x.c
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target/arm/tcc77x/kernel-tcc77x.c
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target/arm/tcc77x/lcd-ssd1815.c
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target/arm/tcc77x/powermgmt-tcc77x.c
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@ -975,8 +975,8 @@ target/arm/tcc77x/pcm-tcc77x.c
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#ifdef SANSA_M200
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#ifndef SIMULATOR
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target/arm/ata-nand-telechips.c
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target/arm/tcc77x/adc-tcc77x.c
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target/arm/tcc77x/ata-nand-tcc77x.c
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target/arm/tcc77x/kernel-tcc77x.c
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target/arm/tcc77x/lcd-ssd1815.c
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target/arm/tcc77x/powermgmt-tcc77x.c
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@ -994,8 +994,8 @@ target/arm/tcc77x/pcm-tcc77x.c
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#ifdef SANSA_C100
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#ifndef SIMULATOR
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target/arm/ata-nand-telechips.c
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target/arm/tcc77x/adc-tcc77x.c
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target/arm/tcc77x/ata-nand-tcc77x.c
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target/arm/tcc77x/kernel-tcc77x.c
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target/arm/tcc77x/c100/lcd-S6B33B2.c
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target/arm/tcc77x/powermgmt-tcc77x.c
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@ -1013,8 +1013,8 @@ target/arm/tcc77x/pcm-tcc77x.c
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#ifdef IAUDIO_7
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#ifndef SIMULATOR
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target/arm/ata-nand-telechips.c
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target/arm/tcc77x/adc-tcc77x.c
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target/arm/tcc77x/ata-nand-tcc77x.c
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target/arm/tcc77x/system-tcc77x.c
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target/arm/tcc77x/iaudio7/lcd-iaudio7.c
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target/arm/tcc77x/iaudio7/power-iaudio7.c
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@ -1025,8 +1025,8 @@ target/arm/tcc77x/iaudio7/power-iaudio7.c
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#ifndef SIMULATOR
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drivers/pcf50606.c
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target/arm/lcd-as-memframe.S
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target/arm/ata-nand-telechips.c
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target/arm/tcc780x/adc-tcc780x.c
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target/arm/tcc780x/ata-nand-tcc780x.c
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target/arm/tcc780x/system-tcc780x.c
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target/arm/tcc780x/cowond2/button-cowond2.c
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target/arm/tcc780x/cowond2/lcd-cowond2.c
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@ -6,6 +6,9 @@
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/* For Rolo and boot loader */
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#define MODEL_NUMBER 29
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/* Enable FAT16 support */
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#define HAVE_FAT16SUPPORT
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/* define this if you have recording possibility */
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//#define HAVE_RECORDING
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@ -59,6 +59,10 @@
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#define PCLKCFG5 (*(volatile unsigned long *)0x80000430)
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#define PCLKCFG6 (*(volatile unsigned long *)0x80000434)
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/* Device bits for SWRESET & BCLKCTR */
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#define DEV_NAND (1<<16)
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/* ADC */
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#define ADCCON (*(volatile unsigned long *)0x80000a00)
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@ -142,4 +146,18 @@
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#define TI0 (1<<0) /* Timer 0 IRQ flag */
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#define TI1 (1<<1) /* Timer 1 IRQ flag */
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/* NAND Flash Controller */
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#define NFC_CMD (*(volatile unsigned long *)0x90000000)
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#define NFC_SADDR (*(volatile unsigned long *)0x9000000C)
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#define NFC_SDATA (*(volatile unsigned long *)0x90000040)
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#define NFC_WDATA (*(volatile unsigned long *)0x90000010)
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#define NFC_CTRL (*(volatile unsigned long *)0x90000050)
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#define NFC_16BIT (1<<26)
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#define NFC_CS0 (1<<23)
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#define NFC_CS1 (1<<22)
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#define NFC_READY (1<<20)
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#define NFC_IREQ (*(volatile unsigned long *)0x90000060)
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#define NFC_RST (*(volatile unsigned long *)0x90000064)
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#endif
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@ -195,4 +195,33 @@
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#define TCC780_VER (*(volatile unsigned long *)0xE0001FFC)
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/* NAND Flash Controller */
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#define NFC_CMD (*(volatile unsigned long *)0xF0053000)
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#define NFC_SADDR (*(volatile unsigned long *)0xF005300C)
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#define NFC_SDATA (*(volatile unsigned long *)0xF0053040)
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#define NFC_WDATA (*(volatile unsigned long *)0xF0053010)
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#define NFC_CTRL (*(volatile unsigned long *)0xF0053050)
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#define NFC_16BIT (1<<26)
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#define NFC_CS0 (1<<23)
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#define NFC_CS1 (1<<22)
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#define NFC_READY (1<<20)
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#define NFC_IREQ (*(volatile unsigned long *)0xF0053060)
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#define NFC_RST (*(volatile unsigned long *)0xF0053064)
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/* ECC Controller */
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#define ECC_CTRL (*(volatile unsigned long *)0xF005B000)
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#define ECC_M4EN (1<<6)
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#define ECC_ENC (1<<27)
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#define ECC_READY (1<<26)
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#define ECC_BASE (*(volatile unsigned long *)0xF005B004)
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#define ECC_CLR (*(volatile unsigned long *)0xF005B00C)
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#define ECC_MLC0W (*(volatile unsigned long *)0xF005B030)
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#define ECC_MLC1W (*(volatile unsigned long *)0xF005B034)
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#define ECC_MLC2W (*(volatile unsigned long *)0xF005B038)
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#define ECC_ERRADDR (*(volatile unsigned long *)0xF005B050)
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#define ECC_ERRDATA (*(volatile unsigned long *)0xF005B060)
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#define ECC_ERR (*(volatile unsigned long *)0xF005B070)
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#endif
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@ -19,7 +19,7 @@
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*
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****************************************************************************/
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#include "ata.h"
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#include "ata-target.h"
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#include "ata-nand-target.h"
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#include "system.h"
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#include <string.h>
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#include "led.h"
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@ -47,43 +47,38 @@ static struct mutex ata_mtx SHAREDBSS_ATTR;
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#define SECTOR_SIZE 512
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/* TCC780x NAND Flash Controller */
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#ifdef COWON_D2
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#define SEGMENT_ID_BIGENDIAN
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#define BLOCKS_PER_SEGMENT 4
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#else
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#define BLOCKS_PER_SEGMENT 1
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#endif
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/* NB: blocks_per_segment should become a runtime check based on NAND id */
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#define NFC_CMD (*(volatile unsigned long *)0xF0053000)
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#define NFC_SADDR (*(volatile unsigned long *)0xF005300C)
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#define NFC_SDATA (*(volatile unsigned long *)0xF0053040)
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#define NFC_WDATA (*(volatile unsigned long *)0xF0053010)
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#define NFC_CTRL (*(volatile unsigned long *)0xF0053050)
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#define NFC_16BIT (1<<26)
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#define NFC_CS0 (1<<23)
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#define NFC_CS1 (1<<22)
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#define NFC_READY (1<<20)
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#define NFC_IREQ (*(volatile unsigned long *)0xF0053060)
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#define NFC_RST (*(volatile unsigned long *)0xF0053064)
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/* Segment type identifiers - main data area */
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#define SEGMENT_MAIN_LPT 0x12
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#define SEGMENT_MAIN_DATA1 0x13
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#define SEGMENT_MAIN_CACHE 0x15
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#define SEGMENT_MAIN_DATA2 0x17
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/* TCC780x ECC Controller */
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/* We don't touch the hidden area at all - these are for reference */
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#define SEGMENT_HIDDEN_LPT 0x22
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#define SEGMENT_HIDDEN_DATA1 0x23
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#define SEGMENT_HIDDEN_CACHE 0x25
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#define SEGMENT_HIDDEN_DATA2 0x27
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#define ECC_CTRL (*(volatile unsigned long *)0xF005B000)
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#define ECC_M4EN (1<<6)
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#define ECC_ENC (1<<27)
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#define ECC_READY (1<<26)
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#define ECC_BASE (*(volatile unsigned long *)0xF005B004)
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#define ECC_CLR (*(volatile unsigned long *)0xF005B00C)
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#define ECC_MLC0W (*(volatile unsigned long *)0xF005B030)
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#define ECC_MLC1W (*(volatile unsigned long *)0xF005B034)
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#define ECC_MLC2W (*(volatile unsigned long *)0xF005B038)
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#define ECC_ERRADDR (*(volatile unsigned long *)0xF005B050)
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#define ECC_ERRDATA (*(volatile unsigned long *)0xF005B060)
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#define ECC_ERR (*(volatile unsigned long *)0xF005B070)
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/* Offsets to spare area data */
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#define OFF_CACHE_PAGE_LOBYTE 2
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#define OFF_CACHE_PAGE_HIBYTE 3
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#define OFF_SEGMENT_TYPE 4
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/* GPIOs */
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#define NAND_GPIO_SET(n) GPIOB_SET = n
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#define NAND_GPIO_CLEAR(n) GPIOB_CLEAR = n
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#define NAND_GPIO_OUT_EN(n) GPIOB_DIR |= n
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#define WE_GPIO_BIT (1<<19) /* Write Enable */
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#define CS_GPIO_BIT (1<<21) /* Chip Select (4 banks when used with NFC_CSx) */
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#ifdef SEGMENT_ID_BIGENDIAN
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#define OFF_LOG_SEG_LOBYTE 7
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#define OFF_LOG_SEG_HIBYTE 6
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#else
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#define OFF_LOG_SEG_LOBYTE 6
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#define OFF_LOG_SEG_HIBYTE 7
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#endif
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/* Chip characteristics, initialised by nand_get_chip_info() */
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@ -106,7 +101,6 @@ static int segments_per_bank = 0;
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#define MAX_SPARE_SIZE 128
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#define MAX_BLOCKS_PER_BANK 8192
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#define MAX_PAGES_PER_BLOCK 128
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#define BLOCKS_PER_SEGMENT 4
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#define MAX_BANKS 4
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#define MAX_SEGMENTS (MAX_BLOCKS_PER_BANK * MAX_BANKS / BLOCKS_PER_SEGMENT)
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@ -152,6 +146,7 @@ static unsigned int ecc_fail_count = 0;
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static inline int phys_segment_to_page_addr(int phys_segment, int page_in_seg)
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{
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#if BLOCKS_PER_SEGMENT == 4 /* D2 */
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int page_addr = phys_segment * pages_per_block * 2;
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if (page_in_seg & 1)
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}
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page_addr += page_in_seg/4;
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#elif BLOCKS_PER_SEGMENT == 1 /* M200 */
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int page_addr = (phys_segment * pages_per_block) + page_in_seg;
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#endif
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return page_addr;
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}
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@ -386,6 +384,18 @@ static void nand_get_chip_info(void)
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switch(id_buf[1]) /* Chip Id */
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{
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case 0xD3: /* K9K8G08UOM */
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page_size = 2048;
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spare_size = 64;
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pages_per_block = 64;
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blocks_per_bank = 8192;
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col_cycles = 2;
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row_cycles = 3;
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found = true;
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break;
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case 0xD5: /* K9LAG08UOM */
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page_size = 2048;
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@ -585,7 +595,8 @@ static void read_lpt_block(int bank, int phys_segment)
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SECTOR_SIZE, /* offset */
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16, spare_buf);
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int first_log_segment = (spare_buf[6] << 8) | spare_buf[7];
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int first_log_segment = (spare_buf[OFF_LOG_SEG_HIBYTE] << 8) |
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spare_buf[OFF_LOG_SEG_LOBYTE];
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lpt_ptr = &lpt_lookup[first_log_segment];
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@ -636,8 +647,11 @@ static void read_write_cache_segment(int bank, int phys_segment)
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SECTOR_SIZE, /* offset to first sector's spare */
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16, spare_buf);
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cached_page = (spare_buf[3] << 8) | spare_buf[2]; /* why does endian */
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log_segment = (spare_buf[6] << 8) | spare_buf[7]; /* -ness differ? */
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cached_page = (spare_buf[OFF_CACHE_PAGE_HIBYTE] << 8) |
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spare_buf[OFF_CACHE_PAGE_LOBYTE];
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log_segment = (spare_buf[OFF_LOG_SEG_HIBYTE] << 8) |
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spare_buf[OFF_LOG_SEG_LOBYTE];
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if (cached_page != 0xFFFF)
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{
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@ -751,18 +765,25 @@ int ata_init(void)
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if (initialized) return 0;
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#ifdef CPU_TCC77X
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CSCFG2 = 0x318a8010;
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GPIOC_FUNC &= ~(CS_GPIO_BIT | WE_GPIO_BIT);
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GPIOC_FUNC |= 0x1;
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#endif
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/* Set GPIO direction for chip select & write protect */
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NAND_GPIO_OUT_EN(CS_GPIO_BIT | WE_GPIO_BIT);
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/* Get chip characteristics and number of banks */
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nand_get_chip_info();
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for (i = 0; i < MAX_SEGMENTS; i++)
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{
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lpt_lookup[i].bank = -1;
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lpt_lookup[i].phys_segment = -1;
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}
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write_caches_in_use = 0;
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for (i = 0; i < MAX_WRITE_CACHES; i++)
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write_caches[i].bank = -1;
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write_caches[i].phys_segment = -1;
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for (page = 0; page < MAX_PAGES_PER_BLOCK * 4; page++)
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for (page = 0; page < MAX_PAGES_PER_BLOCK * BLOCKS_PER_SEGMENT; page++)
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{
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write_caches[i].page_map[page] = -1;
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}
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@ -792,28 +813,30 @@ int ata_init(void)
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switch (spare_buf[4]) /* block type */
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{
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#ifdef USE_TCC_LPT
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case 0x12:
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case SEGMENT_MAIN_LPT:
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{
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/* Log->Phys Translation table (for Main data area) */
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read_lpt_block(bank, phys_segment);
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break;
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}
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#else
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case 0x17:
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case SEGMENT_MAIN_DATA2:
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{
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/* Main data area segment */
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unsigned short segment = (spare_buf[6] << 8) | spare_buf[7];
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unsigned short log_segment
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= (spare_buf[OFF_LOG_SEG_HIBYTE] << 8) |
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spare_buf[OFF_LOG_SEG_LOBYTE];
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if (segment < MAX_SEGMENTS)
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if (log_segment < MAX_SEGMENTS)
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{
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lpt_lookup[segment].bank = bank;
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lpt_lookup[segment].phys_segment = phys_segment;
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lpt_lookup[log_segment].bank = bank;
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lpt_lookup[log_segment].phys_segment = phys_segment;
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}
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break;
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}
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#endif
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case 0x15:
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case SEGMENT_MAIN_CACHE:
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{
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/* Recently-written page data (for Main data area) */
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read_write_cache_segment(bank, phys_segment);
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switch (spare_buf[4]) /* block type */
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{
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case 0x13:
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case SEGMENT_MAIN_DATA1:
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{
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/* Main data area segment */
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unsigned short segment = (spare_buf[6] << 8) | spare_buf[7];
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unsigned short log_segment
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= (spare_buf[OFF_LOG_SEG_HIBYTE] << 8) |
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spare_buf[OFF_LOG_SEG_LOBYTE];
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if (segment < MAX_SEGMENTS)
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if (log_segment < MAX_SEGMENTS)
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{
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/* 0x17 seems to override 0x13, so store in our LPT */
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lpt_lookup[segment].bank = bank;
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lpt_lookup[segment].phys_segment = phys_segment;
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/* 0x13 seems to override 0x17, so store in our LPT */
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lpt_lookup[log_segment].bank = bank;
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lpt_lookup[log_segment].phys_segment = phys_segment;
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}
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break;
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}
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@ -21,4 +21,13 @@
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#ifndef ATA_TARGET_H
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#define ATA_TARGET_H
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/* GPIOs */
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#define NAND_GPIO_SET(n) GPIOC |= n
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#define NAND_GPIO_CLEAR(n) GPIOC &= (~n)
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#define NAND_GPIO_OUT_EN(n) GPIOC_DIR |= n
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#define CS_GPIO_BIT (1<<24) /* Chip Select */
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#define WE_GPIO_BIT (1<<25) /* Write Enable */
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#endif
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@ -1,106 +0,0 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 Dave Chapman
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
|
||||
#include "ata.h"
|
||||
#include "ata-target.h"
|
||||
#include "ata_idle_notify.h"
|
||||
#include "system.h"
|
||||
#include <string.h>
|
||||
#include "thread.h"
|
||||
#include "led.h"
|
||||
#include "disk.h"
|
||||
#include "panic.h"
|
||||
#include "usb.h"
|
||||
|
||||
/* for compatibility */
|
||||
int ata_spinup_time = 0;
|
||||
|
||||
long last_disk_activity = -1;
|
||||
|
||||
/* Used to store (fake?) identify info */
|
||||
static unsigned short identify_info[256];
|
||||
|
||||
/** static, private data **/
|
||||
static bool initialized = false;
|
||||
|
||||
static long next_yield = 0;
|
||||
#define MIN_YIELD_PERIOD 2000
|
||||
|
||||
/* API Functions */
|
||||
|
||||
void ata_led(bool onoff)
|
||||
{
|
||||
led(onoff);
|
||||
}
|
||||
|
||||
int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
|
||||
void* inbuf)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
|
||||
const void* outbuf)
|
||||
{
|
||||
}
|
||||
|
||||
void ata_spindown(int seconds)
|
||||
{
|
||||
(void)seconds;
|
||||
}
|
||||
|
||||
bool ata_disk_is_active(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ata_sleep(void)
|
||||
{
|
||||
}
|
||||
|
||||
void ata_spin(void)
|
||||
{
|
||||
}
|
||||
|
||||
/* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
|
||||
int ata_hard_reset(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ata_soft_reset(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ata_enable(bool on)
|
||||
{
|
||||
}
|
||||
|
||||
int ata_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* TEMP: This will return junk, it's here for compilation only */
|
||||
unsigned short* ata_get_identify(void)
|
||||
{
|
||||
return identify_info;
|
||||
}
|
|
@ -21,4 +21,13 @@
|
|||
#ifndef ATA_TARGET_H
|
||||
#define ATA_TARGET_H
|
||||
|
||||
/* GPIOs */
|
||||
|
||||
#define NAND_GPIO_SET(n) GPIOB_SET = n
|
||||
#define NAND_GPIO_CLEAR(n) GPIOB_CLEAR = n
|
||||
#define NAND_GPIO_OUT_EN(n) GPIOB_DIR |= n
|
||||
|
||||
#define WE_GPIO_BIT (1<<19) /* Write Enable */
|
||||
#define CS_GPIO_BIT (1<<21) /* Chip Select (4 banks when used with NFC_CSx) */
|
||||
|
||||
#endif
|
Loading…
Reference in a new issue