2002-09-03 09:44:08 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 Randy D. Wood
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*
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2008-06-28 18:10:04 +00:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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2002-09-03 09:44:08 +00:00
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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2005-02-02 21:47:08 +00:00
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#include "config.h"
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2002-09-03 09:44:08 +00:00
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#include "lcd.h"
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2012-01-07 19:45:09 +00:00
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#ifdef HAVE_REMOTE_LCD
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2006-04-24 06:45:27 +00:00
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#include "lcd-remote.h"
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2012-01-07 19:45:09 +00:00
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#endif
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2013-12-14 23:38:48 +00:00
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#include "scroll_engine.h"
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2007-09-28 10:20:02 +00:00
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#include "thread.h"
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2002-09-03 09:44:08 +00:00
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#include "kernel.h"
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#include "button.h"
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#include "file.h"
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2005-04-04 12:06:29 +00:00
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#include "audio.h"
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2002-09-03 09:44:08 +00:00
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#include "system.h"
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#include "i2c.h"
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2008-03-26 23:35:34 +00:00
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#include "adc.h"
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2002-09-03 09:44:08 +00:00
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#include "string.h"
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2011-08-30 14:01:33 +00:00
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#include "core_alloc.h"
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2009-10-11 02:06:42 +00:00
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#include "storage.h"
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2008-05-03 07:17:44 +00:00
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#include "rolo.h"
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2002-09-03 09:44:08 +00:00
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2012-03-04 14:34:29 +00:00
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#include "loader_strerror.h"
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#if defined(MI4_FORMAT)
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2007-06-04 13:48:21 +00:00
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#include "crc32-mi4.h"
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2012-03-04 14:34:29 +00:00
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#include "mi4-loader.h"
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#define LOAD_FIRMWARE(a,b,c) load_mi4(a,b,c)
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#elif defined(RKW_FORMAT)
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2012-03-03 23:06:20 +00:00
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#include "rkw-loader.h"
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2012-03-04 14:34:29 +00:00
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#define LOAD_FIRMWARE(a,b,c) load_rkw(a,b,c)
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#else
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#include "rb-loader.h"
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#define LOAD_FIRMWARE(a,b,c) load_firmware(a,b,c)
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2012-03-02 15:49:05 +00:00
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#endif
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2016-01-23 23:04:18 +00:00
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#if CONFIG_CPU == AS3525v2
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#include "ascodec.h"
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#endif
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2009-10-19 21:38:52 +00:00
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#if !defined(IRIVER_IFP7XX_SERIES)
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/* FIX: this doesn't work on iFP */
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2005-02-02 21:47:08 +00:00
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2002-09-03 09:44:08 +00:00
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#define IRQ0_EDGE_TRIGGER 0x80
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2011-08-30 14:01:33 +00:00
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static int rolo_handle;
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2007-02-27 22:55:12 +00:00
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#ifdef CPU_PP
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/* Handle the COP properly - it needs to jump to a function outside SDRAM while
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* the new firmware is being loaded, and then jump to the start of SDRAM
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* TODO: Use the mailboxes built into the PP processor for this
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*/
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2007-09-29 06:56:21 +00:00
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#if NUM_CORES > 1
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2007-02-27 22:55:12 +00:00
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volatile unsigned char IDATA_ATTR cpu_message = 0;
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volatile unsigned char IDATA_ATTR cpu_reply = 0;
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2007-09-28 10:20:02 +00:00
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extern int cop_idlestackbegin[];
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2007-02-27 22:55:12 +00:00
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void rolo_restart_cop(void) ICODE_ATTR;
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void rolo_restart_cop(void)
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{
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2007-09-28 10:20:02 +00:00
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if (CURRENT_CORE == CPU)
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{
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/* There should be free thread slots aplenty */
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create_thread(rolo_restart_cop, cop_idlestackbegin, IDLE_STACK_SIZE,
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2007-10-16 01:25:17 +00:00
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0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME)
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IF_COP(, COP));
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2007-09-28 10:20:02 +00:00
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return;
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}
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2008-06-03 05:19:32 +00:00
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COP_INT_DIS = -1;
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2007-09-28 10:20:02 +00:00
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2007-02-27 22:55:12 +00:00
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/* Invalidate cache */
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2011-12-17 07:27:24 +00:00
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commit_discard_idcache();
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2007-02-27 22:55:12 +00:00
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/* Disable cache */
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2007-09-30 10:53:31 +00:00
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CACHE_CTL = CACHE_CTL_DISABLE;
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2007-02-27 22:55:12 +00:00
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2007-03-04 23:53:38 +00:00
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/* Tell the main core that we're ready to reload */
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2007-09-28 10:20:02 +00:00
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cpu_reply = 1;
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2007-03-04 23:53:38 +00:00
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2007-02-27 22:55:12 +00:00
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/* Wait while RoLo loads the image into SDRAM */
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/* TODO: Accept checksum failure gracefully */
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2007-09-28 10:20:02 +00:00
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while(cpu_message != 1);
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2007-02-27 22:55:12 +00:00
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2007-03-04 23:53:38 +00:00
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/* Acknowledge the CPU and then reload */
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2007-09-28 10:20:02 +00:00
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cpu_reply = 2;
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2007-02-27 22:55:12 +00:00
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asm volatile(
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2010-05-31 14:42:27 +00:00
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"bx %0 \n"
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: : "r"(DRAM_START)
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2007-02-27 22:55:12 +00:00
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);
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}
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2007-09-29 06:56:21 +00:00
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#endif /* NUM_CORES > 1 */
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#endif /* CPU_PP */
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2007-02-27 22:55:12 +00:00
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2004-08-16 23:37:23 +00:00
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static void rolo_error(const char *text)
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2002-09-03 09:44:08 +00:00
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{
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2011-08-30 14:01:33 +00:00
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rolo_handle = core_free(rolo_handle);
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2002-09-03 09:44:08 +00:00
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lcd_clear_display();
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lcd_puts(0, 0, "ROLO error:");
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lcd_puts_scroll(0, 1, text);
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lcd_update();
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button_get(true);
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2003-05-09 16:01:21 +00:00
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button_get(true);
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button_get(true);
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2013-04-03 14:33:23 +00:00
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lcd_scroll_stop();
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2002-09-03 09:44:08 +00:00
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}
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2003-10-12 16:40:45 +00:00
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2012-03-02 15:49:05 +00:00
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#if CONFIG_CPU == SH7034 || CONFIG_CPU == IMX31L || CONFIG_CPU == RK27XX
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2008-05-08 12:09:14 +00:00
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/* these are in assembler file "descramble.S" for SH7034 */
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2004-08-16 23:37:23 +00:00
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extern unsigned short descramble(const unsigned char* source,
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unsigned char* dest, int length);
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2010-04-23 15:32:50 +00:00
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/* this is in firmware/target/arm/imx31/rolo_restart.c for IMX31 */
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2012-03-02 15:49:05 +00:00
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/* this is in firmware/target/arm/rk27xx/rolo_restart.c for rk27xx */
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2004-08-16 23:37:23 +00:00
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extern void rolo_restart(const unsigned char* source, unsigned char* dest,
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int length);
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2005-03-31 08:47:02 +00:00
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#else
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2007-07-17 14:53:44 +00:00
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/* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
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targets that are low on iram, like the gigabeat F/X */
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void rolo_restart(const unsigned char* source, unsigned char* dest,
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long length) __attribute__ ((section(".icode")));
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void rolo_restart(const unsigned char* source, unsigned char* dest,
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long length)
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2005-03-31 08:47:02 +00:00
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{
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long i;
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2005-06-22 16:53:12 +00:00
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unsigned char* localdest = dest;
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2005-03-31 08:47:02 +00:00
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2007-07-16 19:26:07 +00:00
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/* This is the equivalent of a call to memcpy() but this must be done from
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iram to avoid overwriting itself and we don't want to depend on memcpy()
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always being in iram */
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2005-03-31 08:47:02 +00:00
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for(i = 0;i < length;i++)
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2005-06-22 16:53:12 +00:00
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*localdest++ = *source++;
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2005-03-31 08:47:02 +00:00
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2006-07-13 21:11:20 +00:00
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#if defined(CPU_COLDFIRE)
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2005-06-22 16:53:12 +00:00
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asm (
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"movec.l %0,%%vbr \n"
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"move.l (%0)+,%%sp \n"
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"move.l (%0),%0 \n"
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"jmp (%0) \n"
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: : "a"(dest)
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);
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2009-10-19 21:38:52 +00:00
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#elif defined(CPU_PP)
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2008-06-03 05:08:24 +00:00
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CPU_INT_DIS = -1;
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2007-02-27 22:55:12 +00:00
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2006-12-10 15:20:26 +00:00
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/* Flush cache */
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2011-12-17 07:27:24 +00:00
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commit_discard_idcache();
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2006-12-10 15:20:26 +00:00
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2006-07-23 14:30:10 +00:00
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/* Disable cache */
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2007-09-30 10:53:31 +00:00
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CACHE_CTL = CACHE_CTL_DISABLE;
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2006-07-23 14:30:10 +00:00
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/* Reset the memory mapping registers to zero */
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2007-09-30 10:53:31 +00:00
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{
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volatile unsigned long *mmap_reg;
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for (mmap_reg = &MMAP_FIRST; mmap_reg <= &MMAP_LAST; mmap_reg++)
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*mmap_reg = 0;
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}
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2006-07-23 14:30:10 +00:00
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2007-09-29 06:56:21 +00:00
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#if NUM_CORES > 1
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2007-09-28 10:20:02 +00:00
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/* Tell the COP it's safe to continue rebooting */
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cpu_message = 1;
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2007-03-04 23:53:38 +00:00
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/* Wait for the COP to tell us it is rebooting */
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2007-09-28 10:20:02 +00:00
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while(cpu_reply != 2);
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2007-09-29 06:56:21 +00:00
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#endif
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2007-11-15 06:44:35 +00:00
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2006-07-23 14:30:10 +00:00
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asm volatile(
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2010-05-31 14:42:27 +00:00
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"bx %0 \n"
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2010-05-03 21:50:48 +00:00
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: : "r"(DRAM_START)
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2006-07-23 14:30:10 +00:00
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);
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2008-04-15 20:02:24 +00:00
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2009-10-19 21:32:40 +00:00
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#elif defined(CPU_ARM)
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2008-04-16 23:49:21 +00:00
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/* Flush and invalidate caches */
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2011-12-17 07:27:24 +00:00
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commit_discard_idcache();
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2008-04-15 20:02:24 +00:00
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asm volatile(
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2010-05-31 14:42:27 +00:00
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"bx %0 \n"
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2008-04-15 20:02:24 +00:00
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: : "r"(dest)
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);
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2009-02-26 21:15:40 +00:00
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#elif defined(CPU_MIPS)
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2009-06-04 11:57:43 +00:00
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__dcache_writeback_all();
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2009-02-26 21:15:40 +00:00
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asm volatile(
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"jr %0 \n"
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: : "r"(dest)
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);
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2005-11-11 17:51:35 +00:00
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#endif
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2005-03-31 08:47:02 +00:00
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}
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#endif
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/* This is assigned in the linker control file */
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extern unsigned long loadaddress;
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2003-10-12 16:40:45 +00:00
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2002-09-03 09:44:08 +00:00
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/***************************************************************************
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*
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2012-03-02 15:49:05 +00:00
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* Name: rolo_load(const char *filename)
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2002-09-03 09:44:08 +00:00
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* Filename must be a fully defined filename including the path and extension
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*
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***************************************************************************/
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2012-03-04 14:34:29 +00:00
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#if defined(CPU_COLDFIRE) || defined(CPU_ARM) || defined(CPU_MIPS)
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2012-03-02 15:49:05 +00:00
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int rolo_load(const char* filename)
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{
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unsigned char* ramstart = (void*)&loadaddress;
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unsigned char* filebuf;
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size_t filebuf_size;
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2017-11-07 21:48:07 +00:00
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int err, length;
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2012-03-02 15:49:05 +00:00
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lcd_clear_display();
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lcd_puts(0, 0, "ROLO...");
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lcd_puts(0, 1, "Loading");
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lcd_update();
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#ifdef HAVE_REMOTE_LCD
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lcd_remote_clear_display();
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lcd_remote_puts(0, 0, "ROLO...");
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lcd_remote_puts(0, 1, "Loading");
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lcd_remote_update();
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#endif
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audio_stop();
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/* get the system buffer. release only in case of error, otherwise
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* we don't return anyway */
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rolo_handle = core_alloc_maximum("rolo", &filebuf_size, NULL);
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filebuf = core_get_data(rolo_handle);
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|
2017-11-07 21:48:07 +00:00
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err = LOAD_FIRMWARE(filebuf, filename, filebuf_size);
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2012-03-04 14:34:29 +00:00
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2017-11-07 21:48:07 +00:00
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if (err <= 0)
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2012-03-02 15:49:05 +00:00
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{
|
2017-11-07 21:48:07 +00:00
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rolo_error(loader_strerror(err));
|
2012-03-02 15:49:05 +00:00
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return -1;
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}
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else
|
2017-11-07 21:48:07 +00:00
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length = err;
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2012-03-02 15:49:05 +00:00
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2012-03-04 14:34:29 +00:00
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#if defined(CPU_PP) && NUM_CORES > 1
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lcd_puts(0, 2, "Waiting for coprocessor...");
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lcd_update();
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rolo_restart_cop();
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/* Wait for COP to be in safe code */
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while(cpu_reply != 1);
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lcd_puts(0, 2, " ");
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lcd_update();
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#endif
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2012-03-02 15:49:05 +00:00
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#ifdef HAVE_STORAGE_FLUSH
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lcd_puts(0, 1, "Flushing storage buffers");
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lcd_update();
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storage_flush();
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#endif
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lcd_puts(0, 1, "Executing");
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lcd_update();
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#ifdef HAVE_REMOTE_LCD
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lcd_remote_puts(0, 1, "Executing");
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lcd_remote_update();
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#endif
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adc_close();
|
2016-01-18 23:21:10 +00:00
|
|
|
#if CONFIG_CPU == AS3525v2
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|
/* Set CVDD1 power supply to default*/
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ascodec_write_pmu(0x17, 1, 0);
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#endif
|
2016-04-22 12:17:35 +00:00
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#if defined(SANSA_FUZEV2) || defined(SANSA_CLIPPLUS) || defined(SANSA_CLIPZIP)
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|
/* It is necessary for proper detection AMSv2 variant 1.
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* We should restore initial state of GPIOB_PIN(5) as it used for
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* variant detection, but can be changed if we switch SD card. */
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if (amsv2_variant == 1)
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GPIOB_PIN(5) = 1 << 5;
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#endif
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2012-03-02 15:49:05 +00:00
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2012-03-04 14:34:29 +00:00
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#if CONFIG_CPU != IMX31L /* We're not finished yet */
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#ifdef CPU_ARM
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/* Should do these together since some ARM version should never have
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* FIQ disabled and not IRQ (imx31 errata). */
|
2012-03-02 15:49:05 +00:00
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disable_interrupt(IRQ_FIQ_STATUS);
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2012-03-04 14:34:29 +00:00
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#else
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/* Some targets have a higher disable level than HIGEST_IRQ_LEVEL */
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set_irq_level(DISABLE_INTERRUPTS);
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#endif
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#endif /* CONFIG_CPU == IMX31L */
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2012-03-02 15:49:05 +00:00
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rolo_restart(filebuf, ramstart, length);
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/* never reached */
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return 0;
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|
}
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2012-03-04 14:34:29 +00:00
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#else /* defined(CPU_SH) */
|
2004-08-16 23:37:23 +00:00
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int rolo_load(const char* filename)
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2002-09-03 09:44:08 +00:00
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|
{
|
2003-10-12 16:40:45 +00:00
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|
int fd;
|
2005-03-31 08:47:02 +00:00
|
|
|
long length;
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|
|
|
long file_length;
|
2002-09-03 09:44:08 +00:00
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|
unsigned short checksum,file_checksum;
|
2005-03-31 08:47:02 +00:00
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|
unsigned char* ramstart = (void*)&loadaddress;
|
2011-08-14 15:13:00 +00:00
|
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|
unsigned char* filebuf;
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|
|
size_t filebuf_size;
|
2002-09-03 09:44:08 +00:00
|
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|
|
lcd_clear_display();
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|
|
lcd_puts(0, 0, "ROLO...");
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|
lcd_puts(0, 1, "Loading");
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|
|
lcd_update();
|
2006-04-24 06:45:27 +00:00
|
|
|
#ifdef HAVE_REMOTE_LCD
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|
lcd_remote_clear_display();
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|
|
lcd_remote_puts(0, 0, "ROLO...");
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|
lcd_remote_puts(0, 1, "Loading");
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|
lcd_remote_update();
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|
#endif
|
2002-09-03 09:44:08 +00:00
|
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|
2005-04-04 12:06:29 +00:00
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|
audio_stop();
|
2002-09-03 09:44:08 +00:00
|
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|
|
fd = open(filename, O_RDONLY);
|
|
|
|
if(-1 == fd) {
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|
|
|
rolo_error("File not found");
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|
|
return -1;
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|
|
|
}
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|
2005-03-31 08:47:02 +00:00
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|
|
length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
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|
|
|
|
2011-08-14 15:13:00 +00:00
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|
|
/* get the system buffer. release only in case of error, otherwise
|
|
|
|
* we don't return anyway */
|
2011-08-30 14:01:33 +00:00
|
|
|
rolo_handle = core_alloc_maximum("rolo", &filebuf_size, NULL);
|
|
|
|
filebuf = core_get_data(rolo_handle);
|
2011-08-14 15:13:00 +00:00
|
|
|
|
2002-09-03 09:44:08 +00:00
|
|
|
/* Read file length from header and compare to real file length */
|
2003-01-22 18:47:35 +00:00
|
|
|
lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
|
2002-09-03 09:44:08 +00:00
|
|
|
if(read(fd, &file_length, 4) != 4) {
|
|
|
|
rolo_error("Error Reading File Length");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
if (length != file_length) {
|
|
|
|
rolo_error("File length mismatch");
|
|
|
|
return -1;
|
|
|
|
}
|
2007-10-13 14:53:34 +00:00
|
|
|
|
2002-09-03 09:44:08 +00:00
|
|
|
/* Read and save checksum */
|
2003-01-22 18:47:35 +00:00
|
|
|
lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
|
2002-09-03 09:44:08 +00:00
|
|
|
if (read(fd, &file_checksum, 2) != 2) {
|
|
|
|
rolo_error("Error Reading checksum");
|
|
|
|
return -1;
|
|
|
|
}
|
2003-01-22 18:47:35 +00:00
|
|
|
lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
|
2002-09-03 09:44:08 +00:00
|
|
|
|
|
|
|
/* verify that file can be read and descrambled */
|
2011-08-14 15:13:00 +00:00
|
|
|
if ((size_t)((2*length)+4) >= filebuf_size) {
|
2002-09-03 09:44:08 +00:00
|
|
|
rolo_error("Not enough room to load file");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2011-08-14 15:13:00 +00:00
|
|
|
if (read(fd, &filebuf[length], length) != (int)length) {
|
2002-09-03 09:44:08 +00:00
|
|
|
rolo_error("Error Reading File");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2002-09-09 12:59:06 +00:00
|
|
|
lcd_puts(0, 1, "Descramble");
|
2002-09-03 09:44:08 +00:00
|
|
|
lcd_update();
|
|
|
|
|
2011-08-14 15:13:00 +00:00
|
|
|
checksum = descramble(filebuf + length, filebuf, length);
|
2007-10-13 14:53:34 +00:00
|
|
|
|
2003-10-12 16:40:45 +00:00
|
|
|
/* Verify checksum against file header */
|
2002-09-03 09:44:08 +00:00
|
|
|
if (checksum != file_checksum) {
|
|
|
|
rolo_error("Checksum Error");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2009-10-21 20:21:41 +00:00
|
|
|
#ifdef HAVE_STORAGE_FLUSH
|
2009-10-21 20:29:51 +00:00
|
|
|
lcd_puts(0, 1, "Flushing ");
|
|
|
|
lcd_update();
|
2009-10-21 20:21:41 +00:00
|
|
|
storage_flush();
|
|
|
|
#endif
|
|
|
|
|
2009-10-21 20:29:51 +00:00
|
|
|
lcd_puts(0, 1, "Executing ");
|
|
|
|
lcd_update();
|
|
|
|
|
2005-03-31 08:47:02 +00:00
|
|
|
set_irq_level(HIGHEST_IRQ_LEVEL);
|
2007-10-13 14:53:34 +00:00
|
|
|
|
2002-09-03 09:44:08 +00:00
|
|
|
/* Calling these 2 initialization routines was necessary to get the
|
|
|
|
the origional Archos version of the firmware to load and execute. */
|
|
|
|
system_init(); /* Initialize system for restart */
|
|
|
|
i2c_init(); /* Init i2c bus - it seems like a good idea */
|
|
|
|
ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
|
2005-02-02 21:47:08 +00:00
|
|
|
TSTR = 0xE0; /* disable all timers */
|
2004-10-14 23:40:58 +00:00
|
|
|
/* model-specific de-init, needed when flashed */
|
|
|
|
/* Especially the Archos software is picky about this */
|
2005-02-02 21:47:08 +00:00
|
|
|
#if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
|
|
|
|
defined(ARCHOS_FMRECORDER)
|
|
|
|
PAIOR = 0x0FA0;
|
2005-03-31 08:47:02 +00:00
|
|
|
#endif
|
2011-08-14 15:13:00 +00:00
|
|
|
rolo_restart(filebuf, ramstart, length);
|
2002-09-03 09:44:08 +00:00
|
|
|
|
|
|
|
return 0; /* this is never reached */
|
2008-04-15 15:41:13 +00:00
|
|
|
(void)checksum; (void)file_checksum;
|
2002-09-03 09:44:08 +00:00
|
|
|
}
|
2012-03-04 14:34:29 +00:00
|
|
|
#endif /* */
|
2006-11-10 20:26:01 +00:00
|
|
|
#else /* !defined(IRIVER_IFP7XX_SERIES) */
|
2005-02-02 21:47:08 +00:00
|
|
|
int rolo_load(const char* filename)
|
|
|
|
{
|
|
|
|
/* dummy */
|
2005-02-03 10:07:11 +00:00
|
|
|
(void)filename;
|
|
|
|
return 0;
|
2005-02-02 21:47:08 +00:00
|
|
|
}
|
|
|
|
|
2006-11-10 20:26:01 +00:00
|
|
|
#endif /* !defined(IRIVER_IFP7XX_SERIES) */
|