2002-09-03 09:44:08 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 Randy D. Wood
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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2005-02-02 21:47:08 +00:00
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#include "config.h"
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2002-09-03 09:44:08 +00:00
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#include "lcd.h"
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2006-04-24 06:45:27 +00:00
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#include "lcd-remote.h"
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2007-09-28 10:20:02 +00:00
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#include "thread.h"
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2002-09-03 09:44:08 +00:00
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#include "kernel.h"
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#include "sprintf.h"
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#include "button.h"
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#include "file.h"
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2005-04-04 12:06:29 +00:00
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#include "audio.h"
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2002-09-03 09:44:08 +00:00
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#include "system.h"
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#include "i2c.h"
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#include "string.h"
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2003-05-09 16:01:21 +00:00
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#include "buffer.h"
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2002-09-03 09:44:08 +00:00
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2007-06-04 13:48:21 +00:00
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#ifdef MI4_FORMAT
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#include "crc32-mi4.h"
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#undef FIRMWARE_OFFSET_FILE_CRC
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#undef FIRMWARE_OFFSET_FILE_DATA
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#define FIRMWARE_OFFSET_FILE_CRC 0xC
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#define FIRMWARE_OFFSET_FILE_DATA 0x200
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#endif
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2006-11-10 20:26:01 +00:00
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#if !defined(IRIVER_IFP7XX_SERIES) && \
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2006-12-19 11:33:53 +00:00
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(CONFIG_CPU != PP5002) && (CONFIG_CPU != S3C2440)
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/* FIX: this doesn't work on iFP, 3rd Gen ipods */
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2005-02-02 21:47:08 +00:00
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2002-09-03 09:44:08 +00:00
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#define IRQ0_EDGE_TRIGGER 0x80
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2007-02-27 22:55:12 +00:00
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#ifdef CPU_PP
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/* Handle the COP properly - it needs to jump to a function outside SDRAM while
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* the new firmware is being loaded, and then jump to the start of SDRAM
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* TODO: Use the mailboxes built into the PP processor for this
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*/
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2007-09-29 06:56:21 +00:00
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#if NUM_CORES > 1
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2007-02-27 22:55:12 +00:00
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volatile unsigned char IDATA_ATTR cpu_message = 0;
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volatile unsigned char IDATA_ATTR cpu_reply = 0;
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2007-09-28 10:20:02 +00:00
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extern int cop_idlestackbegin[];
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2007-02-27 22:55:12 +00:00
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void rolo_restart_cop(void) ICODE_ATTR;
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void rolo_restart_cop(void)
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{
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2007-09-28 10:20:02 +00:00
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if (CURRENT_CORE == CPU)
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{
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/* There should be free thread slots aplenty */
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create_thread(rolo_restart_cop, cop_idlestackbegin, IDLE_STACK_SIZE,
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2007-10-16 01:25:17 +00:00
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0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME)
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IF_COP(, COP));
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2007-09-28 10:20:02 +00:00
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return;
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}
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COP_INT_CLR = -1;
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2007-02-27 22:55:12 +00:00
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/* Invalidate cache */
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2007-04-13 20:55:48 +00:00
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invalidate_icache();
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2007-02-27 22:55:12 +00:00
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/* Disable cache */
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2007-09-30 10:53:31 +00:00
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CACHE_CTL = CACHE_CTL_DISABLE;
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2007-02-27 22:55:12 +00:00
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2007-03-04 23:53:38 +00:00
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/* Tell the main core that we're ready to reload */
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2007-09-28 10:20:02 +00:00
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cpu_reply = 1;
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2007-03-04 23:53:38 +00:00
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2007-02-27 22:55:12 +00:00
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/* Wait while RoLo loads the image into SDRAM */
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/* TODO: Accept checksum failure gracefully */
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2007-09-28 10:20:02 +00:00
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while(cpu_message != 1);
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2007-02-27 22:55:12 +00:00
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2007-03-04 23:53:38 +00:00
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/* Acknowledge the CPU and then reload */
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2007-09-28 10:20:02 +00:00
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cpu_reply = 2;
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2007-02-27 22:55:12 +00:00
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asm volatile(
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"mov r0, #0x10000000 \n"
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"mov pc, r0 \n"
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);
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}
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2007-09-29 06:56:21 +00:00
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#endif /* NUM_CORES > 1 */
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#endif /* CPU_PP */
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2007-02-27 22:55:12 +00:00
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2004-08-16 23:37:23 +00:00
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static void rolo_error(const char *text)
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2002-09-03 09:44:08 +00:00
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{
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lcd_clear_display();
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lcd_puts(0, 0, "ROLO error:");
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lcd_puts_scroll(0, 1, text);
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lcd_update();
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button_get(true);
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2003-05-09 16:01:21 +00:00
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button_get(true);
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button_get(true);
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2002-09-03 09:44:08 +00:00
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lcd_stop_scroll();
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}
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2003-10-12 16:40:45 +00:00
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2005-03-31 08:47:02 +00:00
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#if CONFIG_CPU == SH7034
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2003-10-12 16:40:45 +00:00
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/* these are in assembler file "descramble.S" */
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2004-08-16 23:37:23 +00:00
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extern unsigned short descramble(const unsigned char* source,
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unsigned char* dest, int length);
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extern void rolo_restart(const unsigned char* source, unsigned char* dest,
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int length);
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2005-03-31 08:47:02 +00:00
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#else
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2007-07-17 14:53:44 +00:00
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/* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
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targets that are low on iram, like the gigabeat F/X */
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void rolo_restart(const unsigned char* source, unsigned char* dest,
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long length) __attribute__ ((section(".icode")));
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void rolo_restart(const unsigned char* source, unsigned char* dest,
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long length)
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2005-03-31 08:47:02 +00:00
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{
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long i;
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2005-06-22 16:53:12 +00:00
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unsigned char* localdest = dest;
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2005-03-31 08:47:02 +00:00
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2007-07-16 19:26:07 +00:00
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/* This is the equivalent of a call to memcpy() but this must be done from
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iram to avoid overwriting itself and we don't want to depend on memcpy()
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always being in iram */
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2005-03-31 08:47:02 +00:00
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for(i = 0;i < length;i++)
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2005-06-22 16:53:12 +00:00
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*localdest++ = *source++;
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2005-03-31 08:47:02 +00:00
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2006-07-13 21:11:20 +00:00
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#if defined(CPU_COLDFIRE)
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2005-06-22 16:53:12 +00:00
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asm (
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"movec.l %0,%%vbr \n"
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"move.l (%0)+,%%sp \n"
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"move.l (%0),%0 \n"
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"jmp (%0) \n"
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: : "a"(dest)
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);
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2007-07-02 05:16:40 +00:00
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#elif defined(CPU_PP502x)
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2007-09-28 10:20:02 +00:00
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CPU_INT_CLR = -1;
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2007-02-27 22:55:12 +00:00
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2006-12-10 15:20:26 +00:00
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/* Flush cache */
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2007-04-13 20:55:48 +00:00
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flush_icache();
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2006-12-10 15:20:26 +00:00
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2006-07-23 14:30:10 +00:00
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/* Disable cache */
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2007-09-30 10:53:31 +00:00
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CACHE_CTL = CACHE_CTL_DISABLE;
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2006-07-23 14:30:10 +00:00
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/* Reset the memory mapping registers to zero */
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2007-09-30 10:53:31 +00:00
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{
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volatile unsigned long *mmap_reg;
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for (mmap_reg = &MMAP_FIRST; mmap_reg <= &MMAP_LAST; mmap_reg++)
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*mmap_reg = 0;
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}
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2006-07-23 14:30:10 +00:00
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2007-09-29 06:56:21 +00:00
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#if NUM_CORES > 1
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2007-09-28 10:20:02 +00:00
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/* Tell the COP it's safe to continue rebooting */
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cpu_message = 1;
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2007-03-04 23:53:38 +00:00
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/* Wait for the COP to tell us it is rebooting */
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2007-09-28 10:20:02 +00:00
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while(cpu_reply != 2);
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2007-09-29 06:56:21 +00:00
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#endif
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2007-11-11 19:13:09 +00:00
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2006-07-23 14:30:10 +00:00
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asm volatile(
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"mov r0, #0x10000000 \n"
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"mov pc, r0 \n"
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);
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2005-11-11 17:51:35 +00:00
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#endif
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2005-03-31 08:47:02 +00:00
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}
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#endif
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/* This is assigned in the linker control file */
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extern unsigned long loadaddress;
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2003-10-12 16:40:45 +00:00
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2002-09-03 09:44:08 +00:00
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/***************************************************************************
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*
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* Name: rolo_load_app(char *filename,int scrambled)
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* Filename must be a fully defined filename including the path and extension
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*
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***************************************************************************/
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2004-08-16 23:37:23 +00:00
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int rolo_load(const char* filename)
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2002-09-03 09:44:08 +00:00
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{
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2003-10-12 16:40:45 +00:00
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int fd;
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2005-03-31 08:47:02 +00:00
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long length;
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2007-10-13 14:53:34 +00:00
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#if defined(CPU_COLDFIRE) || defined(CPU_ARM)
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2007-06-04 13:48:21 +00:00
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#if !defined(MI4_FORMAT)
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2005-03-31 08:47:02 +00:00
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int i;
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2007-06-04 13:48:21 +00:00
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#endif
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2005-03-31 08:47:02 +00:00
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unsigned long checksum,file_checksum;
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#else
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long file_length;
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2002-09-03 09:44:08 +00:00
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unsigned short checksum,file_checksum;
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2005-03-31 08:47:02 +00:00
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#endif
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unsigned char* ramstart = (void*)&loadaddress;
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2002-09-03 09:44:08 +00:00
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lcd_clear_display();
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lcd_puts(0, 0, "ROLO...");
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lcd_puts(0, 1, "Loading");
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lcd_update();
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2006-04-24 06:45:27 +00:00
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#ifdef HAVE_REMOTE_LCD
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lcd_remote_clear_display();
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lcd_remote_puts(0, 0, "ROLO...");
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lcd_remote_puts(0, 1, "Loading");
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lcd_remote_update();
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#endif
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2002-09-03 09:44:08 +00:00
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2005-04-04 12:06:29 +00:00
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audio_stop();
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2002-09-03 09:44:08 +00:00
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fd = open(filename, O_RDONLY);
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if(-1 == fd) {
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rolo_error("File not found");
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return -1;
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}
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2005-03-31 08:47:02 +00:00
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length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
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2007-10-13 14:53:34 +00:00
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#if defined(CPU_COLDFIRE) || defined(CPU_PP) || (CONFIG_CPU==DM320)
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2005-03-31 08:47:02 +00:00
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/* Read and save checksum */
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lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
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if (read(fd, &file_checksum, 4) != 4) {
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rolo_error("Error Reading checksum");
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return -1;
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}
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2006-07-23 14:30:10 +00:00
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2007-06-04 13:48:21 +00:00
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#if !defined(MI4_FORMAT)
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2006-07-23 14:30:10 +00:00
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/* Rockbox checksums are big-endian */
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file_checksum = betoh32(file_checksum);
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2007-06-04 13:48:21 +00:00
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#endif
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2007-09-29 06:56:21 +00:00
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#if defined(CPU_PP) && NUM_CORES > 1
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2007-03-04 23:53:38 +00:00
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lcd_puts(0, 2, "Waiting for coprocessor...");
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lcd_update();
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2007-09-28 10:20:02 +00:00
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rolo_restart_cop();
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/* Wait for COP to be in safe code */
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while(cpu_reply != 1);
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2007-03-04 23:53:38 +00:00
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lcd_puts(0, 2, " ");
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lcd_update();
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2007-02-27 22:55:12 +00:00
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#endif
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2006-07-23 14:30:10 +00:00
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2005-03-31 08:47:02 +00:00
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lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
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2005-04-05 11:33:58 +00:00
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if (read(fd, audiobuf, length) != length) {
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2005-03-31 08:47:02 +00:00
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rolo_error("Error Reading File");
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return -1;
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}
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2007-06-04 13:48:21 +00:00
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#ifdef MI4_FORMAT
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/* Check CRC32 to see if we have a valid file */
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chksum_crc32gentab();
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checksum = chksum_crc32 (audiobuf, length);
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#else
|
2005-07-18 15:50:06 +00:00
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checksum = MODEL_NUMBER;
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2007-10-13 14:53:34 +00:00
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2005-03-31 08:47:02 +00:00
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for(i = 0;i < length;i++) {
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2005-04-05 11:33:58 +00:00
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checksum += audiobuf[i];
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2005-03-31 08:47:02 +00:00
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}
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2007-06-04 13:48:21 +00:00
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#endif
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2005-03-31 08:47:02 +00:00
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/* Verify checksum against file header */
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if (checksum != file_checksum) {
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rolo_error("Checksum Error");
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return -1;
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}
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|
2006-04-24 06:45:27 +00:00
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lcd_puts(0, 1, "Executing");
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2005-03-31 08:47:02 +00:00
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lcd_update();
|
2006-04-24 06:45:27 +00:00
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#ifdef HAVE_REMOTE_LCD
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lcd_remote_puts(0, 1, "Executing");
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lcd_remote_update();
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#endif
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2005-03-31 08:47:02 +00:00
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set_irq_level(HIGHEST_IRQ_LEVEL);
|
2005-11-07 23:07:19 +00:00
|
|
|
#elif CONFIG_CPU == SH7034
|
2002-09-03 09:44:08 +00:00
|
|
|
/* Read file length from header and compare to real file length */
|
2003-01-22 18:47:35 +00:00
|
|
|
lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
|
2002-09-03 09:44:08 +00:00
|
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|
if(read(fd, &file_length, 4) != 4) {
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|
rolo_error("Error Reading File Length");
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|
return -1;
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|
|
}
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|
|
if (length != file_length) {
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|
|
rolo_error("File length mismatch");
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|
|
return -1;
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|
|
}
|
2007-10-13 14:53:34 +00:00
|
|
|
|
2002-09-03 09:44:08 +00:00
|
|
|
/* Read and save checksum */
|
2003-01-22 18:47:35 +00:00
|
|
|
lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
|
2002-09-03 09:44:08 +00:00
|
|
|
if (read(fd, &file_checksum, 2) != 2) {
|
|
|
|
rolo_error("Error Reading checksum");
|
|
|
|
return -1;
|
|
|
|
}
|
2003-01-22 18:47:35 +00:00
|
|
|
lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
|
2002-09-03 09:44:08 +00:00
|
|
|
|
|
|
|
/* verify that file can be read and descrambled */
|
2005-04-05 11:33:58 +00:00
|
|
|
if ((audiobuf + (2*length)+4) >= audiobufend) {
|
2002-09-03 09:44:08 +00:00
|
|
|
rolo_error("Not enough room to load file");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2005-04-05 11:33:58 +00:00
|
|
|
if (read(fd, &audiobuf[length], length) != (int)length) {
|
2002-09-03 09:44:08 +00:00
|
|
|
rolo_error("Error Reading File");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2002-09-09 12:59:06 +00:00
|
|
|
lcd_puts(0, 1, "Descramble");
|
2002-09-03 09:44:08 +00:00
|
|
|
lcd_update();
|
|
|
|
|
2005-04-05 11:33:58 +00:00
|
|
|
checksum = descramble(audiobuf + length, audiobuf, length);
|
2007-10-13 14:53:34 +00:00
|
|
|
|
2003-10-12 16:40:45 +00:00
|
|
|
/* Verify checksum against file header */
|
2002-09-03 09:44:08 +00:00
|
|
|
if (checksum != file_checksum) {
|
|
|
|
rolo_error("Checksum Error");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2002-09-09 12:59:06 +00:00
|
|
|
lcd_puts(0, 1, "Executing ");
|
2002-09-03 09:44:08 +00:00
|
|
|
lcd_update();
|
|
|
|
|
2005-03-31 08:47:02 +00:00
|
|
|
set_irq_level(HIGHEST_IRQ_LEVEL);
|
2007-10-13 14:53:34 +00:00
|
|
|
|
2002-09-03 09:44:08 +00:00
|
|
|
/* Calling these 2 initialization routines was necessary to get the
|
|
|
|
the origional Archos version of the firmware to load and execute. */
|
|
|
|
system_init(); /* Initialize system for restart */
|
|
|
|
i2c_init(); /* Init i2c bus - it seems like a good idea */
|
|
|
|
ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
|
2005-02-02 21:47:08 +00:00
|
|
|
TSTR = 0xE0; /* disable all timers */
|
2004-10-14 23:40:58 +00:00
|
|
|
/* model-specific de-init, needed when flashed */
|
|
|
|
/* Especially the Archos software is picky about this */
|
2005-02-02 21:47:08 +00:00
|
|
|
#if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
|
|
|
|
defined(ARCHOS_FMRECORDER)
|
|
|
|
PAIOR = 0x0FA0;
|
2003-10-12 16:40:45 +00:00
|
|
|
#endif
|
2005-03-31 08:47:02 +00:00
|
|
|
#endif
|
2005-04-05 11:33:58 +00:00
|
|
|
rolo_restart(audiobuf, ramstart, length);
|
2002-09-03 09:44:08 +00:00
|
|
|
|
|
|
|
return 0; /* this is never reached */
|
|
|
|
}
|
2006-11-10 20:26:01 +00:00
|
|
|
#else /* !defined(IRIVER_IFP7XX_SERIES) */
|
2005-02-02 21:47:08 +00:00
|
|
|
int rolo_load(const char* filename)
|
|
|
|
{
|
|
|
|
/* dummy */
|
2005-02-03 10:07:11 +00:00
|
|
|
(void)filename;
|
|
|
|
return 0;
|
2005-02-02 21:47:08 +00:00
|
|
|
}
|
|
|
|
|
2006-11-10 20:26:01 +00:00
|
|
|
#endif /* !defined(IRIVER_IFP7XX_SERIES) */
|