777f63d529
Previously these were placed in DRAM, which is overwritten by RoLo when it loads a new image, but RoLo must call commit_discard_idcache() after loading the image. Change-Id: I5dcc4ca711b774166f83c668695edbcabfab2604
60 lines
2.3 KiB
C
60 lines
2.3 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2009 by Maurus Cuelenaere
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __MMU_MIPS_INCLUDE_H
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#define __MMU_MIPS_INCLUDE_H
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#include "system-target.h"
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/* By default the cache management functions go in .icode so they can be
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* called safely eg. by the bootloader or RoLo, which need to flush the
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* cache before jumping to the loaded binary.
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*/
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#ifndef MIPS_CACHEFUNC_ATTR
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# define MIPS_CACHEFUNC_ATTR __attribute__((section(".icode")))
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#endif
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void map_address(unsigned long virtual, unsigned long physical,
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unsigned long length, unsigned int cache_flags);
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void mmu_init(void);
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/* Commits entire DCache */
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void commit_dcache(void) MIPS_CACHEFUNC_ATTR;
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/* Commit and discard entire DCache, will do writeback */
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void commit_discard_dcache(void) MIPS_CACHEFUNC_ATTR;
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/* Write DCache back to RAM for the given range and remove cache lines
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* from DCache afterwards */
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void commit_discard_dcache_range(const void *base, unsigned int size) MIPS_CACHEFUNC_ATTR;
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/* Write DCache back to RAM for the given range */
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void commit_dcache_range(const void *base, unsigned int size) MIPS_CACHEFUNC_ATTR;
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/*
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* Remove cache lines for the given range from DCache
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* will *NOT* do write back except for buffer edges not on a line boundary
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*/
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void discard_dcache_range(const void *base, unsigned int size) MIPS_CACHEFUNC_ATTR;
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/* Discards the entire ICache, and commit+discards the entire DCache */
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void commit_discard_idcache(void) MIPS_CACHEFUNC_ATTR;
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#endif /* __MMU_MIPS_INCLUDE_H */
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