Move MIPS cache management functions to IRAM

Previously these were placed in DRAM, which is overwritten by RoLo
when it loads a new image, but RoLo must call commit_discard_idcache()
after loading the image.

Change-Id: I5dcc4ca711b774166f83c668695edbcabfab2604
This commit is contained in:
Aidan MacDonald 2021-03-08 10:59:53 +00:00
parent 4e6609e9f2
commit 777f63d529

View file

@ -24,29 +24,37 @@
#include "system-target.h"
/* By default the cache management functions go in .icode so they can be
* called safely eg. by the bootloader or RoLo, which need to flush the
* cache before jumping to the loaded binary.
*/
#ifndef MIPS_CACHEFUNC_ATTR
# define MIPS_CACHEFUNC_ATTR __attribute__((section(".icode")))
#endif
void map_address(unsigned long virtual, unsigned long physical,
unsigned long length, unsigned int cache_flags);
void mmu_init(void);
/* Commits entire DCache */
void commit_dcache(void);
void commit_dcache(void) MIPS_CACHEFUNC_ATTR;
/* Commit and discard entire DCache, will do writeback */
void commit_discard_dcache(void);
void commit_discard_dcache(void) MIPS_CACHEFUNC_ATTR;
/* Write DCache back to RAM for the given range and remove cache lines
* from DCache afterwards */
void commit_discard_dcache_range(const void *base, unsigned int size);
void commit_discard_dcache_range(const void *base, unsigned int size) MIPS_CACHEFUNC_ATTR;
/* Write DCache back to RAM for the given range */
void commit_dcache_range(const void *base, unsigned int size);
void commit_dcache_range(const void *base, unsigned int size) MIPS_CACHEFUNC_ATTR;
/*
* Remove cache lines for the given range from DCache
* will *NOT* do write back except for buffer edges not on a line boundary
*/
void discard_dcache_range(const void *base, unsigned int size);
void discard_dcache_range(const void *base, unsigned int size) MIPS_CACHEFUNC_ATTR;
/* Discards the entire ICache, and commit+discards the entire DCache */
void commit_discard_idcache(void);
void commit_discard_idcache(void) MIPS_CACHEFUNC_ATTR;
#endif /* __MMU_MIPS_INCLUDE_H */