af395f4db6
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16811 a1c6a512-1295-4272-9138-f99709370657
113 lines
2.8 KiB
C
113 lines
2.8 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 by Linus Nielsen Feltzing
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include "system.h"
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#include "kernel.h"
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#include "thread.h"
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#include "adc.h"
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#define CS_LO and_l(~0x80, &GPIO_OUT)
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#define CS_HI or_l(0x80, &GPIO_OUT)
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#define CLK_LO and_l(~0x00400000, &GPIO_OUT)
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#define CLK_HI or_l(0x00400000, &GPIO_OUT)
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#define DO (GPIO_READ & 0x80000000)
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#define DI_LO and_l(~0x00200000, &GPIO_OUT)
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#define DI_HI or_l(0x00200000, &GPIO_OUT)
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/* delay loop */
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#define DELAY \
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({ \
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int _x_; \
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asm volatile ( \
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"move.l #11, %[_x_] \r\n" \
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"1: \r\n" \
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"subq.l #1, %[_x_] \r\n" \
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"bhi.b 1b \r\n" \
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: [_x_]"=&d"(_x_) \
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); \
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})
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unsigned short adc_scan(int channel)
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{
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int level = disable_irq_save();
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unsigned char data = 0;
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int i;
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CS_LO;
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DI_HI; /* Start bit */
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DELAY;
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CLK_HI;
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DELAY;
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CLK_LO;
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DI_HI; /* Single channel */
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DELAY;
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CLK_HI;
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DELAY;
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CLK_LO;
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if(channel & 1) /* LSB of channel number */
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DI_HI;
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else
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DI_LO;
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DELAY;
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CLK_HI;
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DELAY;
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CLK_LO;
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if(channel & 2) /* MSB of channel number */
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DI_HI;
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else
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DI_LO;
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DELAY;
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CLK_HI;
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DELAY;
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CLK_LO;
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DELAY;
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for(i = 0;i < 8;i++) /* 8 bits of data */
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{
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CLK_HI;
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DELAY;
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CLK_LO;
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DELAY;
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data <<= 1;
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data |= DO?1:0;
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}
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CS_HI;
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restore_irq(level);
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return data;
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}
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void adc_init(void)
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{
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or_l(0x80600080, &GPIO_FUNCTION); /* GPIO7: CS
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GPIO21: Data In (to the ADC)
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GPIO22: CLK
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GPIO31: Data Out (from the ADC) */
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or_l(0x00600080, &GPIO_ENABLE);
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or_l(0x80, &GPIO_OUT); /* CS high */
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and_l(~0x00400000, &GPIO_OUT); /* CLK low */
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}
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