d6220f618b
Using a macro to put each function in its own .icode-based section allows us to put the functions in IRAM _and_ have linker GC. This removes a troublesome #ifdef BOOTLOADER_SPL on the X1000 target. Change-Id: Ia7b59778f5c36b7970dee4280547e434a1f4fc5a
60 lines
1.1 KiB
Text
60 lines
1.1 KiB
Text
#include "config.h"
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OUTPUT_FORMAT("elf32-littlemips")
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OUTPUT_ARCH(MIPS)
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ENTRY(_start)
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STARTUP(target/mips/ingenic_x1000/crt0.o)
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#define DRAMORIG 0x80000000
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#define DRAMSIZE (MEMORYSIZE * 0x100000)
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#define USED_DRAM 16K
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/* TCSM is 16 KiB and is mapped starting at address 0xf4000000.
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*
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* The SPL is loaded to TCSM + 0x1000. The area below that is stack space.
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* The first 2 KiB of SPL is just headers. The code begins at TCSM + 0x1800.
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* The maskrom will jump to that address (via jalr) after loading the SPL.
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*/
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MEMORY {
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TCSM : ORIGIN = 0xf4001800, LENGTH = 0x2800
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DRAM : ORIGIN = DRAMORIG + DRAMSIZE - USED_DRAM, LENGTH = USED_DRAM
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}
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SECTIONS
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{
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.text :
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{
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*(.init.text);
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*(.text*);
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*(.icode*);
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} > TCSM
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. = ALIGN(4);
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.rodata :
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{
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*(.rodata*);
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} > TCSM
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. = ALIGN(4);
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.data :
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{
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*(.data*);
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*(.sdata*);
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} > TCSM
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. = ALIGN(4);
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.bss (NOLOAD) :
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{
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_bssbegin = .;
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*(.sbss*);
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*(.bss*);
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*(COMMON);
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*(.scommon*);
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_bssend = .;
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} > TCSM
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.sdram (NOLOAD) :
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{
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*(.sdram);
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} > DRAM
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}
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