bac6a70184
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31149 a1c6a512-1295-4272-9138-f99709370657
336 lines
9.7 KiB
C
336 lines
9.7 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: $
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*
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* Copyright (C) 2011 by Tomasz Moń
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "logf.h"
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#include "system.h"
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#include "string.h"
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#include "audio.h"
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#if CONFIG_I2C == I2C_DM320
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#include "i2c-dm320.h"
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#endif
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#include "audiohw.h"
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/* (7-bit) address is 0x18, the LSB is read/write flag */
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#define AIC3X_ADDR (0x18 << 1)
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static char volume_left = 0, volume_right = 0;
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const struct sound_settings_info audiohw_settings[] = {
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[SOUND_VOLUME] = {"dB", 0, 1, VOLUME_MIN/10, VOLUME_MAX/10, -25},
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/* HAVE_SW_TONE_CONTROLS */
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[SOUND_BASS] = {"dB", 0, 1, -24, 24, 0},
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[SOUND_TREBLE] = {"dB", 0, 1, -24, 24, 0},
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[SOUND_BALANCE] = {"%", 0, 1,-100, 100, 0},
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[SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0},
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[SOUND_STEREO_WIDTH] = {"%", 0, 5, 0, 250, 100},
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};
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/* convert tenth of dB volume to master volume register value */
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int tenthdb2master(int db)
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{
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/* 0 to -63.0dB in 1dB steps, aic3x can goto -63.5 in 0.5dB steps */
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if (db < VOLUME_MIN)
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{
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return 0x7E;
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}
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else if (db >= VOLUME_MAX)
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{
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return 0x00;
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}
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else
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{
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return (-((db)/5)); /* VOLUME_MIN is negative */
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}
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}
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static void aic3x_write_reg(unsigned reg, unsigned value)
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{
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unsigned char data[2];
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data[0] = reg;
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data[1] = value;
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#if CONFIG_I2C == I2C_DM320
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if (i2c_write(AIC3X_ADDR, data, 2) != 0)
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#else
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#warning Implement aic3x_write_reg()
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#endif
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{
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logf("AIC3X error reg=0x%x", reg);
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return;
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}
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}
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static unsigned char aic3x_read_reg(unsigned reg)
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{
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unsigned char data;
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#if CONFIG_I2C == I2C_DM320
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if (i2c_read_bytes(AIC3X_ADDR, reg, &data, 1))
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#else
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#warning Implement aic3x_read_reg()
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#endif
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{
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logf("AIC3X read error reg=0x%0x", reg);
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data = 0;
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}
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return data;
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}
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static void aic3x_change_reg(unsigned reg, unsigned char or_mask,
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unsigned char and_mask)
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{
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unsigned char data;
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data = aic3x_read_reg(reg);
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data &= and_mask;
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data |= or_mask;
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aic3x_write_reg(reg, data);
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}
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static void aic3x_apply_volume(void)
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{
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unsigned char data[3];
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#if 0 /* handle page switching once we use first page at all */
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aic3x_write_reg(0, 0); /* switch to page 0 */
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#endif
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data[0] = AIC3X_LEFT_VOL;
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data[1] = volume_left;
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data[2] = volume_right;
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/* use autoincrement write */
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#if CONFIG_I2C == I2C_DM320
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if (i2c_write(AIC3X_ADDR, data, 3) != 0)
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#else
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#warning Implement aic3x_apply_volume()
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#endif
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{
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logf("AIC3X error in apply volume");
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return;
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}
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}
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static void audiohw_mute(bool mute)
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{
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if (mute)
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{
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/* DAC_L1 routed to HPLOUT, mute */
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aic3x_write_reg(AIC3X_DAC_L1_VOL, 0xF6);
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/* DAC_R1 routed to HPROUT, mute */
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aic3x_write_reg(AIC3X_DAC_R1_VOL, 0xF6);
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/* DAC_L1 routed to MONO_LOP/M, mute */
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aic3x_write_reg(AIC3X_DAC_L1_MONO_LOP_M_VOL, 0xF6);
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/* DAC_R1 routed to MONO_LOP/M, mute */
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aic3x_write_reg(AIC3X_DAC_R1_MONO_LOP_M_VOL, 0xF6);
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volume_left |= 0x80;
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volume_right |= 0x80;
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}
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else
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{
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/* DAC_L1 routed to HPLOUT, volume analog gain 0xC (-6.0dB) */
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aic3x_write_reg(AIC3X_DAC_L1_VOL, 0x8C);
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/* DAC_R1 routed to HPROUT, volume analog gain 0xC (-6.0 dB) */
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aic3x_write_reg(AIC3X_DAC_R1_VOL, 0x8C);
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/* DAC_L1 routed to MONO_LOP/M, gain 0x2 (-1.0dB) */
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aic3x_write_reg(AIC3X_DAC_L1_MONO_LOP_M_VOL, 0x92);
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/* DAC_R1 routed to MONO_LOP/M, gain 0x2 (-1.0dB) */
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aic3x_write_reg(AIC3X_DAC_R1_MONO_LOP_M_VOL, 0x92);
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volume_left &= 0x7F;
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volume_right &= 0x7F;
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}
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aic3x_apply_volume();
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}
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/* public functions */
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/**
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* Init our tlv with default values
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*/
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void audiohw_init(void)
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{
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logf("AIC3X init");
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/* Do software reset (self-clearing) */
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aic3x_write_reg(AIC3X_SOFT_RESET, 0x80);
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/* driver power-on time 200 ms, ramp-up step time 4 ms */
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aic3x_write_reg(AIC3X_POP_REDUCT, 0x7C);
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/* Output common-move voltage 1.35V, disable LINE2[LR] bypass */
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/* Output soft-stepping = one step per fs */
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aic3x_write_reg(AIC3X_POWER_OUT, 0x00);
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/* Audio data interface */
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/* GPIO1 used for audio serial data bus ADC word clock */
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aic3x_write_reg(AIC3X_GPIO1_CTRL, 0x10);
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/* BCLK and WCLK are outputs (master mode) */
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aic3x_write_reg(AIC3X_DATA_REG_A, 0xC0);
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/* right-justified mode */
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aic3x_write_reg(AIC3X_DATA_REG_B, 0x80);
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/* data offset = 0 clocks */
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aic3x_write_reg(AIC3X_DATA_REG_C, 0);
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/* Left DAC plays left channel, Right DAC plays right channel */
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aic3x_write_reg(AIC3X_DATAPATH, 0xA);
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/* power left and right DAC, HPLCOM constant VCM output */
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aic3x_write_reg(AIC3X_DAC_POWER, 0xD0);
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/* HPRCOM as constant VCM output. Enable short-circuit protection
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(limit current) */
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aic3x_write_reg(AIC3X_HIGH_POWER, 0xC);
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/* DAC_L1 routed to HPLOUT */
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aic3x_write_reg(AIC3X_DAC_L1_VOL, 0x80);
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/* DAC_R1 routed to HPROUT */
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aic3x_write_reg(AIC3X_DAC_R1_VOL, 0x80);
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/* DAC_L1 routed to MONO_LOP/M */
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aic3x_write_reg(AIC3X_DAC_L1_MONO_LOP_M_VOL, 0x80);
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/* DAC_R1 routed to MONO_LOP/M */
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aic3x_write_reg(AIC3X_DAC_R1_MONO_LOP_M_VOL, 0x80);
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/* DAC_L1 routed to LEFT_LOP/M */
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aic3x_write_reg(AIC3X_DAC_L1_LEFT_LOP_M_VOL, 0x80);
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/* DAC_R1 routed to RIGHT_LOP/M */
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aic3x_write_reg(AIC3X_DAC_R1_RIGHT_LOP_M_VOL, 0x80);
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/* LEFT_LOP/M output level 0dB, not muted */
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aic3x_write_reg(AIC3X_LEFT_LOP_M_LVL, 0x8);
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/* RIGHT_LOP/M output level 0dB, not muted */
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aic3x_write_reg(AIC3X_RIGHT_LOP_M_LVL, 0x8);
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/* Enable PLL. Set Q=16, P=1 */
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aic3x_write_reg(AIC3X_PLL_REG_A, 0x81);
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/* PLL J = 53 */
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aic3x_write_reg(AIC3X_PLL_REG_B, 0xD4);
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/* PLL D = 5211 */
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aic3x_write_reg(AIC3X_PLL_REG_C, 0x51);
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aic3x_write_reg(AIC3X_PLL_REG_D, 0x6C);
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/* PLL R = 1 */
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aic3x_write_reg(AIC3X_OVERFLOW, 0x01);
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/* ADC fs = fs(ref)/5.5; DAC fs = fs(ref) */
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aic3x_write_reg(AIC3X_SMPL_RATE, 0x90);
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/* HPLOUT output level 0dB, muted, high impedance */
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aic3x_write_reg(AIC3X_HPLOUT_LVL, 0x04);
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/* HPROUT output level 0dB, muted, high impedance */
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aic3x_write_reg(AIC3X_HPROUT_LVL, 0x04);
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/* HPLCOM is high impedance when powered down, not fully powered up */
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aic3x_write_reg(AIC3X_HPLCOM_LVL, 0x04);
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}
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void audiohw_postinit(void)
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{
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audiohw_mute(false);
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/* HPLOUT output level 0dB, not muted, fully powered up */
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aic3x_write_reg(AIC3X_HPLOUT_LVL, 0x09);
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/* HPROUT output level 0dB, not muted, fully powered up */
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aic3x_write_reg(AIC3X_HPROUT_LVL, 0x09);
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/* MONO_LOP output level 6dB, not muted */
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aic3x_write_reg(AIC3X_MONO_LOP_M_LVL, 0x69);
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/* PGA_R is not routed to MONO_LOP/M, analog gain -52.7dB */
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aic3x_write_reg(AIC3X_PGA_R_MONO_LOP_M_VOL, 0x69);
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}
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void audiohw_set_frequency(int fsel)
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{
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(void)fsel;
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/* TODO */
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}
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void audiohw_set_headphone_vol(int vol_l, int vol_r)
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{
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if ((volume_left & 0x7F) == (vol_l & 0x7F) &&
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(volume_right & 0x7F) == (vol_r & 0x7F))
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{
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/* Volume already set to this value */
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return;
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}
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volume_left &= 0x80; /* preserve mute bit */
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volume_left |= (vol_l & 0x7F); /* set gain */
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volume_right &= 0x80; /* preserve mute bit */
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volume_right |= (vol_r & 0x7F); /* set gain */
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aic3x_apply_volume();
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}
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/* Nice shutdown of AIC3X codec */
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void audiohw_close(void)
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{
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/* HPLOUT, HPROUT, HPLCOM not fully powered up */
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aic3x_change_reg(AIC3X_HPLOUT_LVL, 0x00, 0xFE);
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aic3x_change_reg(AIC3X_HPROUT_LVL, 0x00, 0xFE);
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aic3x_change_reg(AIC3X_HPLCOM_LVL, 0x00, 0xFC);
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/* MONO_LOP/M, LEFT_LOP/M, RIGHT_LOP/M muted, not fully powered up */
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aic3x_change_reg(AIC3X_MONO_LOP_M_LVL, 0x00, 0xF6);
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aic3x_change_reg(AIC3X_LEFT_LOP_M_LVL, 0x00, 0xF6);
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aic3x_change_reg(AIC3X_RIGHT_LOP_M_LVL, 0x00, 0xF6);
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/* Power down left and right DAC */
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aic3x_change_reg(AIC3X_DAC_POWER, 0x00, 0x30);
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/* Disable PLL */
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aic3x_change_reg(AIC3X_PLL_REG_A, 0x00, 0x7F);
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}
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void aic3x_switch_output(bool stereo)
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{
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if (stereo)
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{
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/* mute MONO_LOP/M */
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aic3x_change_reg(AIC3X_MONO_LOP_M_LVL, 0x00, 0xF6);
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/* HPLOUT fully powered up */
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aic3x_change_reg(AIC3X_HPLOUT_LVL, 0x01, 0xFF);
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/* HPROUT fully powered up */
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aic3x_change_reg(AIC3X_HPROUT_LVL, 0x01, 0xFF);
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/* HPLCOM fully powered up */
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aic3x_change_reg(AIC3X_HPLCOM_LVL, 0x01, 0xFF);
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}
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else
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{
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/* MONO_LOP/M not muted */
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aic3x_change_reg(AIC3X_MONO_LOP_M_LVL, 0x09, 0xFF);
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/* HPLOUT not fully powered up */
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aic3x_change_reg(AIC3X_HPLOUT_LVL, 0x00, 0xFE);
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/* HPROUT not fully powered up */
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aic3x_change_reg(AIC3X_HPROUT_LVL, 0x00, 0xFE);
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/* HPLCOM not fully powered up */
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aic3x_change_reg(AIC3X_HPLCOM_LVL, 0x00, 0xFE);
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}
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}
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