4eb5aa2392
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28740 a1c6a512-1295-4272-9138-f99709370657
232 lines
6.1 KiB
C
232 lines
6.1 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* adopted for HD300 by Marcin Bukat
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* Copyright (C) 2009 by Bertrik Sikken
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* Copyright (C) 2008 by Robert Kukla
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "rtc.h"
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#include "i2c-coldfire.h"
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#include "lcd.h"
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#include "font.h"
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/* Driver for the Seiko S35380A real-time clock chip with i2c interface
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This driver was derived from rtc_s3539a.c and adapted for the MPIO HD300
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*/
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#define RTC_ADDR 0x60
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#define STATUS_REG1 0
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#define STATUS_REG2 1
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#define REALTIME_DATA1 2
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#define REALTIME_DATA2 3
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#define INT1_REG 4
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#define INT2_REG 5
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#define CLOCK_CORR_REG 6
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#define FREE_REG 7
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/* STATUS_REG1 flags
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* bits order is reversed
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*/
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#define STATUS_REG1_POC 0x01
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#define STATUS_REG1_BLD 0x02
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#define STATUS_REG1_INT2 0x04
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#define STATUS_REG1_INT1 0x08
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#define STATUS_REG1_SC1 0x10
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#define STATUS_REG1_SC0 0x20
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#define STATUS_REG1_H1224 0x40
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#define STATUS_REG1_RESET 0x80
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/* STATUS_REG2 flags
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* bits order is reversed
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*/
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#define STATUS_REG2_TEST 0x01
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#define STATUS_REG2_INT2AE 0x02
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#define STATUS_REG2_INT2ME 0x04
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#define STATUS_REG2_INT2FE 0x08
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#define STATUS_REG2_32kE 0x10
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#define STATUS_REG2_INT1AE 0x20
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#define STATUS_REG2_INT1ME 0x40
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#define STATUS_REG2_INT1FE 0x80
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static void reverse_bits(unsigned char* v, int size)
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{
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static const unsigned char flipnibble[] =
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{0x00, 0x08, 0x04, 0x0C, 0x02, 0x0A, 0x06, 0x0E,
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0x01, 0x09, 0x05, 0x0D, 0x03, 0x0B, 0x07, 0x0F};
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int i;
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for (i = 0; i < size; i++) {
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v[i] = (flipnibble[v[i] & 0x0F] << 4) |
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flipnibble[(v[i] >> 4) & 0x0F];
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}
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}
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void rtc_init(void)
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{
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unsigned char status_reg;
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i2c_read(I2C_IFACE_1, RTC_ADDR | (STATUS_REG1<<1), &status_reg, 1);
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if ( (status_reg & STATUS_REG1_POC) ||
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(status_reg & STATUS_REG1_BLD) )
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{
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/* perform rtc reset*/
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status_reg |= STATUS_REG1_RESET;
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i2c_write(I2C_IFACE_1, RTC_ADDR | (STATUS_REG1<<1), &status_reg, 1);
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}
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/* setup 24h time format */
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status_reg = STATUS_REG1_H1224;
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i2c_write(I2C_IFACE_1, RTC_ADDR | (STATUS_REG1<<1), &status_reg, 1);
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#ifdef HAVE_RTC_ALARM
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rtc_check_alarm_started(false);
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#endif
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/* disable all alarms */
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status_reg = 0;
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i2c_write(I2C_IFACE_1, RTC_ADDR | (STATUS_REG2<<1), &status_reg, 1);
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}
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int rtc_read_datetime(struct tm *tm)
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{
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unsigned char buf[7];
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unsigned int i;
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int ret;
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ret = i2c_read(I2C_IFACE_1, RTC_ADDR | (REALTIME_DATA1<<1), buf, sizeof(buf));
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reverse_bits(buf, sizeof(buf));
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buf[4] &= 0x3f; /* mask out p.m. flag */
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for (i = 0; i < sizeof(buf); i++)
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buf[i] = BCD2DEC(buf[i]);
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tm->tm_sec = buf[6];
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tm->tm_min = buf[5];
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tm->tm_hour = buf[4];
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tm->tm_wday = buf[3];
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tm->tm_mday = buf[2];
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tm->tm_mon = buf[1] - 1;
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tm->tm_year = buf[0] + 100;
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return ret;
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}
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int rtc_write_datetime(const struct tm *tm)
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{
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unsigned char buf[7];
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unsigned int i;
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int ret;
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buf[6] = tm->tm_sec;
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buf[5] = tm->tm_min;
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buf[4] = tm->tm_hour;
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buf[3] = tm->tm_wday;
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buf[2] = tm->tm_mday;
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buf[1] = tm->tm_mon + 1;
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buf[0] = tm->tm_year - 100;
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for (i = 0; i < sizeof(buf); i++)
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buf[i] = DEC2BCD(buf[i]);
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reverse_bits(buf, sizeof(buf));
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ret = i2c_write(I2C_IFACE_1, RTC_ADDR | (REALTIME_DATA1<<1), buf, sizeof(buf));
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return ret;
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}
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#ifdef HAVE_RTC_ALARM
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void rtc_set_alarm(int h, int m)
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{
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/* 1) get the date
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* 2) compare h:m with current time
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if alarm time < current time set day += 1
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3) check day if it is not needed to wrap around
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4) set the validity bits
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5) write to alarm register
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*/
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unsigned char buf[3];
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unsigned char reg;
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/* 0x80 - validity flag */
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buf[2] = DEC2BCD(m) | 0x80;
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buf[1] = DEC2BCD(h) | 0x80;
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buf[0] = 0;
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reverse_bits(buf, sizeof(buf));
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reg = STATUS_REG2_INT1AE;
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i2c_write(I2C_IFACE_1, RTC_ADDR | (STATUS_REG2<<1), ®, 1);
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i2c_write(I2C_IFACE_1, RTC_ADDR | (INT1_REG<<1), buf, sizeof(buf));
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}
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void rtc_get_alarm(int *h, int *m)
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{
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unsigned char buf[3];
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unsigned char reg,reg2;
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i2c_read(I2C_IFACE_1, RTC_ADDR | (STATUS_REG2<<1), ®, 1);
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reg2 = reg | STATUS_REG2_INT1AE;
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i2c_write(I2C_IFACE_1, RTC_ADDR | (STATUS_REG2<<1), ®2, 1);
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i2c_read(I2C_IFACE_1, RTC_ADDR | (INT1_REG<<1), buf, sizeof(buf));
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i2c_write(I2C_IFACE_1, RTC_ADDR | (STATUS_REG2<<1), ®, 1);
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reverse_bits(buf, sizeof(buf));
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*h = BCD2DEC(buf[1] & 0x3f); /* mask out A1HE and PM/AM flag */
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*m = BCD2DEC(buf[2] & 0x7f); /* mask out A1mE */
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}
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bool rtc_check_alarm_flag(void)
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{
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unsigned char status_reg;
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i2c_read(I2C_IFACE_1, RTC_ADDR | (STATUS_REG1<<1), &status_reg, 1);
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return (status_reg & (STATUS_REG1_INT1 | STATUS_REG1_INT2));
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}
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void rtc_enable_alarm(bool enable)
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{
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unsigned char status_reg2;
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status_reg2 = enable ? STATUS_REG2_INT1AE:0;
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i2c_write(I2C_IFACE_1, RTC_ADDR | (STATUS_REG2<<1), &status_reg2, 1);
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}
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bool rtc_check_alarm_started(bool release_alarm)
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{
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static bool run_before = false, alarm_state;
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bool rc;
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if (run_before)
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{
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rc = alarm_state;
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alarm_state &= ~release_alarm;
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}
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else
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{
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rc = rtc_check_alarm_flag();
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run_before = true;
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}
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return rc;
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}
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#endif
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