rockbox/firmware/target/mips
Aidan MacDonald 47cbeb2e67 x1000: add support for simple on-die ECC with NAND flash
Many SPI NAND flash chips have on-die ECC engines that report
ECC status via the status feature register. This code handles
the common case where ECC status is reported with 2 bits: one
bit to indicate if flips were detected & corrected, and another
bit to indicate an uncorrectable error.

Change-Id: I5d587cd960ca9d090d2629e890724a6bc411e70c
2022-07-10 15:22:32 +01:00
..
ingenic_jz47xx jz4760: Reformat USB driver a little. Prep work for later changes. 2022-06-12 17:09:32 -04:00
ingenic_x1000 x1000: add support for simple on-die ECC with NAND flash 2022-07-10 15:22:32 +01:00
mipsr2-endian.h MIPS: add another mipsr2 endian function 2021-05-29 15:35:50 +00:00
mmu-mips.c New port: FiiO M3K on bare metal 2021-03-28 00:01:37 +00:00
mmu-mips.h MIPS: emulate -ffunction-sections with macros in mmu-mips 2021-04-25 14:04:38 +00:00