Aidan MacDonald 1b8542490d x1000: Redesign SPL, and allow it to flash the bootloader ... SPL is now designed so core X1000 code is in control of the boot, under the reasonable assumption that the device boots from flash. It should not be too hard to adapt to other X1000 ports. The biggest functional change is that the SPL can now read/write the flash, under the control of a host computer. The SPL relies on the boot ROM for USB communication, so the host has to execute the SPL multiple times following a protocol. Change-Id: I3ffaa00e4bf191e043c9df0e2e64d15193ff42c9		2021-04-17 20:22:49 +00:00
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ingenic_jz47xx	xduoox3: Global volume_limit now applies to the line output as well	2021-04-09 15:54:04 -04:00
ingenic_x1000	x1000: Redesign SPL, and allow it to flash the bootloader	2021-04-17 20:22:49 +00:00
mipsr2-endian.h	New port: FiiO M3K on bare metal	2021-03-28 00:01:37 +00:00
mmu-mips.c	New port: FiiO M3K on bare metal	2021-03-28 00:01:37 +00:00
mmu-mips.h	Move MIPS cache management functions to IRAM	2021-03-09 20:04:30 +00:00