Nyaaori/rockbox
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
rockbox/firmware/target/arm/imx31
History
Michael Sevakis 4048a1cf4b Merely correct a comment. 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25802 a1c6a512-1295-4272-9138-f99709370657
2010-05-04 10:43:32 +00:00
..
gigabeat-s i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code. 2010-05-04 10:07:53 +00:00
app.lds
ata-imx31.c Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. 2010-04-09 01:21:53 +00:00
ata-target.h Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. 2010-04-09 01:21:53 +00:00
avic-imx31.c Gigabeat S: Those odd calls to irq_handler can still happen rarely after executing WFI. With no explanation forthcoming after trying many things, hide head in sand and ignore them and the IRQ will get vectored to the correct handler anyway. Have vector tables execute an immediate return and remove irq_handler from compilation altogether. 2010-05-03 07:48:00 +00:00
avic-imx31.h i.MX31/Gigabeat S: Implement frequency and voltage scaling-- 1.6V for 528MHz, and 1.35V for 264MHz and 132MHz. Keep DPTC overdrive ( > 400MHz) voltage scaling off for now because of uncertainties. Simplify the (working) mess later. 2010-04-23 15:32:50 +00:00
boot.lds Gigabeat S: Implement MDMA and UDMA disk access for bootloader and main binary. Add a needed SDMA API to check channel errors. Increase audio DMA channels' priority as required. Reads and writes measure faster accross all test_disk tests and especially at 4KB and 1MB. 2009-03-12 06:31:40 +00:00
ccm-imx31.c i.MX31/Gigabeat S: Implement frequency and voltage scaling-- 1.6V for 528MHz, and 1.35V for 264MHz and 132MHz. Keep DPTC overdrive ( > 400MHz) voltage scaling off for now because of uncertainties. Simplify the (working) mess later. 2010-04-23 15:32:50 +00:00
ccm-imx31.h i.MX31/Gigabeat S: Implement frequency and voltage scaling-- 1.6V for 528MHz, and 1.35V for 264MHz and 132MHz. Keep DPTC overdrive ( > 400MHz) voltage scaling off for now because of uncertainties. Simplify the (working) mess later. 2010-04-23 15:32:50 +00:00
crt0.S Gigabeat S: Those odd calls to irq_handler can still happen rarely after executing WFI. With no explanation forthcoming after trying many things, hide head in sand and ignore them and the IRQ will get vectored to the correct handler anyway. Have vector tables execute an immediate return and remove irq_handler from compilation altogether. 2010-05-03 07:48:00 +00:00
debug-imx31.c i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code. 2010-05-04 10:07:53 +00:00
debug-target.h
dvfs_dptc-imx31.c Merely correct a comment. 2010-05-04 10:43:32 +00:00
dvfs_dptc-imx31.h i.MX31/Gigabeat S: Implement frequency and voltage scaling-- 1.6V for 528MHz, and 1.35V for 264MHz and 132MHz. Keep DPTC overdrive ( > 400MHz) voltage scaling off for now because of uncertainties. Simplify the (working) mess later. 2010-04-23 15:32:50 +00:00
gpio-imx31.c Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. 2010-04-09 01:21:53 +00:00
gpio-imx31.h Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. 2010-04-09 01:21:53 +00:00
i2c-imx31.c Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. 2010-04-09 01:21:53 +00:00
i2c-imx31.h Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. 2010-04-09 01:21:53 +00:00
iomuxc-imx31.c i.MX31: Add some enums and a couple helper functions to make dealing with pin muxing and pad configuration a bit more sane. Convert any existing code which changes mux/pad settings to use helpers. 2010-04-23 13:46:04 +00:00
iomuxc-imx31.h i.MX31: Add some enums and a couple helper functions to make dealing with pin muxing and pad configuration a bit more sane. Convert any existing code which changes mux/pad settings to use helpers. 2010-04-23 13:46:04 +00:00
mc13783-imx31.c i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code. 2010-05-04 10:07:53 +00:00
mmu-imx31.c Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. 2010-04-09 01:21:53 +00:00
mmu-imx31.h Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. 2010-04-09 01:21:53 +00:00
rolo_restart_firmware.S i.MX31/Gigabeat S: Implement frequency and voltage scaling-- 1.6V for 528MHz, and 1.35V for 264MHz and 132MHz. Keep DPTC overdrive ( > 400MHz) voltage scaling off for now because of uncertainties. Simplify the (working) mess later. 2010-04-23 15:32:50 +00:00
sdma-imx31.c i.MX31/Gigabeat S: Implement frequency and voltage scaling-- 1.6V for 528MHz, and 1.35V for 264MHz and 132MHz. Keep DPTC overdrive ( > 400MHz) voltage scaling off for now because of uncertainties. Simplify the (working) mess later. 2010-04-23 15:32:50 +00:00
sdma-imx31.h Gigabeat S: Implement MDMA and UDMA disk access for bootloader and main binary. Add a needed SDMA API to check channel errors. Increase audio DMA channels' priority as required. Reads and writes measure faster accross all test_disk tests and especially at 4KB and 1MB. 2009-03-12 06:31:40 +00:00
sdma_script_code.h Fix tabs 2010-01-03 10:19:43 +00:00
sdma_struct.h Fix tabs 2010-01-03 10:19:43 +00:00
serial-imx31.h Gigabeat S/i.MX31: Sort files in the /target tree into things that are SoC-generic (into /imx31) and player-specific (into /gigabeat-s, based upon current appearances). Move i2s clock init into the appropriate file. Housekeeping only-- no functional changes. 2010-04-09 01:21:53 +00:00
spi-imx31.c i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code. 2010-05-04 10:07:53 +00:00
spi-imx31.h i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code. 2010-05-04 10:07:53 +00:00