192 lines
8.4 KiB
C
192 lines
8.4 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* This file was automatically generated by headergen, DO NOT EDIT it.
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* headergen version: 3.0.0
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* x1000 version: 1.0
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* x1000 authors: Aidan MacDonald
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*
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* Copyright (C) 2015 by the authors
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __HEADERGEN_TCU_H__
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#define __HEADERGEN_TCU_H__
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#include "macro.h"
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#define REG_TCU_STATUS jz_reg(TCU_STATUS)
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#define JA_TCU_STATUS (0xb0002000 + 0xf0)
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#define JT_TCU_STATUS JIO_32_RW
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#define JN_TCU_STATUS TCU_STATUS
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#define JI_TCU_STATUS
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#define REG_TCU_STATUS_SET jz_reg(TCU_STATUS_SET)
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#define JA_TCU_STATUS_SET (JA_TCU_STATUS + 0x4)
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#define JT_TCU_STATUS_SET JIO_32_WO
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#define JN_TCU_STATUS_SET TCU_STATUS
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#define JI_TCU_STATUS_SET
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#define REG_TCU_STATUS_CLR jz_reg(TCU_STATUS_CLR)
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#define JA_TCU_STATUS_CLR (JA_TCU_STATUS + 0x8)
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#define JT_TCU_STATUS_CLR JIO_32_WO
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#define JN_TCU_STATUS_CLR TCU_STATUS
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#define JI_TCU_STATUS_CLR
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#define REG_TCU_STOP jz_reg(TCU_STOP)
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#define JA_TCU_STOP (0xb0002000 + 0x1c)
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#define JT_TCU_STOP JIO_32_RW
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#define JN_TCU_STOP TCU_STOP
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#define JI_TCU_STOP
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#define REG_TCU_STOP_SET jz_reg(TCU_STOP_SET)
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#define JA_TCU_STOP_SET (JA_TCU_STOP + 0x10)
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#define JT_TCU_STOP_SET JIO_32_WO
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#define JN_TCU_STOP_SET TCU_STOP
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#define JI_TCU_STOP_SET
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#define REG_TCU_STOP_CLR jz_reg(TCU_STOP_CLR)
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#define JA_TCU_STOP_CLR (JA_TCU_STOP + 0x20)
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#define JT_TCU_STOP_CLR JIO_32_WO
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#define JN_TCU_STOP_CLR TCU_STOP
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#define JI_TCU_STOP_CLR
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#define REG_TCU_ENABLE jz_reg(TCU_ENABLE)
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#define JA_TCU_ENABLE (0xb0002000 + 0x10)
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#define JT_TCU_ENABLE JIO_32_RW
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#define JN_TCU_ENABLE TCU_ENABLE
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#define JI_TCU_ENABLE
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#define REG_TCU_ENABLE_SET jz_reg(TCU_ENABLE_SET)
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#define JA_TCU_ENABLE_SET (JA_TCU_ENABLE + 0x4)
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#define JT_TCU_ENABLE_SET JIO_32_WO
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#define JN_TCU_ENABLE_SET TCU_ENABLE
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#define JI_TCU_ENABLE_SET
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#define REG_TCU_ENABLE_CLR jz_reg(TCU_ENABLE_CLR)
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#define JA_TCU_ENABLE_CLR (JA_TCU_ENABLE + 0x8)
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#define JT_TCU_ENABLE_CLR JIO_32_WO
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#define JN_TCU_ENABLE_CLR TCU_ENABLE
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#define JI_TCU_ENABLE_CLR
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#define REG_TCU_FLAG jz_reg(TCU_FLAG)
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#define JA_TCU_FLAG (0xb0002000 + 0x20)
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#define JT_TCU_FLAG JIO_32_RW
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#define JN_TCU_FLAG TCU_FLAG
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#define JI_TCU_FLAG
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#define REG_TCU_FLAG_SET jz_reg(TCU_FLAG_SET)
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#define JA_TCU_FLAG_SET (JA_TCU_FLAG + 0x4)
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#define JT_TCU_FLAG_SET JIO_32_WO
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#define JN_TCU_FLAG_SET TCU_FLAG
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#define JI_TCU_FLAG_SET
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#define REG_TCU_FLAG_CLR jz_reg(TCU_FLAG_CLR)
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#define JA_TCU_FLAG_CLR (JA_TCU_FLAG + 0x8)
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#define JT_TCU_FLAG_CLR JIO_32_WO
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#define JN_TCU_FLAG_CLR TCU_FLAG
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#define JI_TCU_FLAG_CLR
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#define REG_TCU_MASK jz_reg(TCU_MASK)
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#define JA_TCU_MASK (0xb0002000 + 0x30)
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#define JT_TCU_MASK JIO_32_RW
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#define JN_TCU_MASK TCU_MASK
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#define JI_TCU_MASK
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#define REG_TCU_MASK_SET jz_reg(TCU_MASK_SET)
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#define JA_TCU_MASK_SET (JA_TCU_MASK + 0x4)
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#define JT_TCU_MASK_SET JIO_32_WO
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#define JN_TCU_MASK_SET TCU_MASK
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#define JI_TCU_MASK_SET
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#define REG_TCU_MASK_CLR jz_reg(TCU_MASK_CLR)
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#define JA_TCU_MASK_CLR (JA_TCU_MASK + 0x8)
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#define JT_TCU_MASK_CLR JIO_32_WO
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#define JN_TCU_MASK_CLR TCU_MASK
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#define JI_TCU_MASK_CLR
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#define REG_TCU_CMP_FULL(_n1) jz_reg(TCU_CMP_FULL(_n1))
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#define JA_TCU_CMP_FULL(_n1) (0xb0002000 + 0x40 + (_n1) * 0x10)
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#define JT_TCU_CMP_FULL(_n1) JIO_32_RW
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#define JN_TCU_CMP_FULL(_n1) TCU_CMP_FULL
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#define JI_TCU_CMP_FULL(_n1) (_n1)
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#define REG_TCU_CMP_HALF(_n1) jz_reg(TCU_CMP_HALF(_n1))
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#define JA_TCU_CMP_HALF(_n1) (0xb0002000 + 0x44 + (_n1) * 0x10)
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#define JT_TCU_CMP_HALF(_n1) JIO_32_RW
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#define JN_TCU_CMP_HALF(_n1) TCU_CMP_HALF
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#define JI_TCU_CMP_HALF(_n1) (_n1)
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#define REG_TCU_COUNT(_n1) jz_reg(TCU_COUNT(_n1))
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#define JA_TCU_COUNT(_n1) (0xb0002000 + 0x48 + (_n1) * 0x10)
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#define JT_TCU_COUNT(_n1) JIO_32_RW
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#define JN_TCU_COUNT(_n1) TCU_COUNT
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#define JI_TCU_COUNT(_n1) (_n1)
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#define REG_TCU_CTRL(_n1) jz_reg(TCU_CTRL(_n1))
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#define JA_TCU_CTRL(_n1) (0xb0002000 + 0x4c + (_n1) * 0x10)
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#define JT_TCU_CTRL(_n1) JIO_32_RW
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#define JN_TCU_CTRL(_n1) TCU_CTRL
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#define JI_TCU_CTRL(_n1) (_n1)
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#define BP_TCU_CTRL_PRESCALE 3
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#define BM_TCU_CTRL_PRESCALE 0x38
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#define BV_TCU_CTRL_PRESCALE__BY_1 0x0
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#define BV_TCU_CTRL_PRESCALE__BY_4 0x1
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#define BV_TCU_CTRL_PRESCALE__BY_16 0x2
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#define BV_TCU_CTRL_PRESCALE__BY_64 0x3
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#define BV_TCU_CTRL_PRESCALE__BY_256 0x4
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#define BV_TCU_CTRL_PRESCALE__BY_1024 0x5
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#define BF_TCU_CTRL_PRESCALE(v) (((v) & 0x7) << 3)
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#define BFM_TCU_CTRL_PRESCALE(v) BM_TCU_CTRL_PRESCALE
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#define BF_TCU_CTRL_PRESCALE_V(e) BF_TCU_CTRL_PRESCALE(BV_TCU_CTRL_PRESCALE__##e)
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#define BFM_TCU_CTRL_PRESCALE_V(v) BM_TCU_CTRL_PRESCALE
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#define BP_TCU_CTRL_SOURCE 0
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#define BM_TCU_CTRL_SOURCE 0x7
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#define BV_TCU_CTRL_SOURCE__EXT 0x4
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#define BV_TCU_CTRL_SOURCE__RTC 0x2
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#define BV_TCU_CTRL_SOURCE__PCLK 0x1
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#define BF_TCU_CTRL_SOURCE(v) (((v) & 0x7) << 0)
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#define BFM_TCU_CTRL_SOURCE(v) BM_TCU_CTRL_SOURCE
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#define BF_TCU_CTRL_SOURCE_V(e) BF_TCU_CTRL_SOURCE(BV_TCU_CTRL_SOURCE__##e)
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#define BFM_TCU_CTRL_SOURCE_V(v) BM_TCU_CTRL_SOURCE
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#define BP_TCU_CTRL_BYPASS 11
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#define BM_TCU_CTRL_BYPASS 0x800
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#define BF_TCU_CTRL_BYPASS(v) (((v) & 0x1) << 11)
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#define BFM_TCU_CTRL_BYPASS(v) BM_TCU_CTRL_BYPASS
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#define BF_TCU_CTRL_BYPASS_V(e) BF_TCU_CTRL_BYPASS(BV_TCU_CTRL_BYPASS__##e)
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#define BFM_TCU_CTRL_BYPASS_V(v) BM_TCU_CTRL_BYPASS
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#define BP_TCU_CTRL_CLRZ 10
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#define BM_TCU_CTRL_CLRZ 0x400
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#define BF_TCU_CTRL_CLRZ(v) (((v) & 0x1) << 10)
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#define BFM_TCU_CTRL_CLRZ(v) BM_TCU_CTRL_CLRZ
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#define BF_TCU_CTRL_CLRZ_V(e) BF_TCU_CTRL_CLRZ(BV_TCU_CTRL_CLRZ__##e)
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#define BFM_TCU_CTRL_CLRZ_V(v) BM_TCU_CTRL_CLRZ
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#define BP_TCU_CTRL_SHUTDOWN 9
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#define BM_TCU_CTRL_SHUTDOWN 0x200
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#define BV_TCU_CTRL_SHUTDOWN__GRACEFUL 0x0
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#define BV_TCU_CTRL_SHUTDOWN__ABRUPT 0x1
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#define BF_TCU_CTRL_SHUTDOWN(v) (((v) & 0x1) << 9)
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#define BFM_TCU_CTRL_SHUTDOWN(v) BM_TCU_CTRL_SHUTDOWN
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#define BF_TCU_CTRL_SHUTDOWN_V(e) BF_TCU_CTRL_SHUTDOWN(BV_TCU_CTRL_SHUTDOWN__##e)
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#define BFM_TCU_CTRL_SHUTDOWN_V(v) BM_TCU_CTRL_SHUTDOWN
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#define BP_TCU_CTRL_INIT_LVL 8
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#define BM_TCU_CTRL_INIT_LVL 0x100
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#define BF_TCU_CTRL_INIT_LVL(v) (((v) & 0x1) << 8)
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#define BFM_TCU_CTRL_INIT_LVL(v) BM_TCU_CTRL_INIT_LVL
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#define BF_TCU_CTRL_INIT_LVL_V(e) BF_TCU_CTRL_INIT_LVL(BV_TCU_CTRL_INIT_LVL__##e)
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#define BFM_TCU_CTRL_INIT_LVL_V(v) BM_TCU_CTRL_INIT_LVL
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#define BP_TCU_CTRL_PWM_EN 7
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#define BM_TCU_CTRL_PWM_EN 0x80
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#define BF_TCU_CTRL_PWM_EN(v) (((v) & 0x1) << 7)
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#define BFM_TCU_CTRL_PWM_EN(v) BM_TCU_CTRL_PWM_EN
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#define BF_TCU_CTRL_PWM_EN_V(e) BF_TCU_CTRL_PWM_EN(BV_TCU_CTRL_PWM_EN__##e)
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#define BFM_TCU_CTRL_PWM_EN_V(v) BM_TCU_CTRL_PWM_EN
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#define BP_TCU_CTRL_PWM_IN_EN 6
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#define BM_TCU_CTRL_PWM_IN_EN 0x40
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#define BF_TCU_CTRL_PWM_IN_EN(v) (((v) & 0x1) << 6)
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#define BFM_TCU_CTRL_PWM_IN_EN(v) BM_TCU_CTRL_PWM_IN_EN
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#define BF_TCU_CTRL_PWM_IN_EN_V(e) BF_TCU_CTRL_PWM_IN_EN(BV_TCU_CTRL_PWM_IN_EN__##e)
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#define BFM_TCU_CTRL_PWM_IN_EN_V(v) BM_TCU_CTRL_PWM_IN_EN
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#endif /* __HEADERGEN_TCU_H__*/
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