eac1ca22bd
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
84 lines
4.2 KiB
C
84 lines
4.2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* This file was automatically generated by headergen, DO NOT EDIT it.
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* headergen version: 3.0.0
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* stmp3600 version: 2.4.0
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* stmp3600 authors: Amaury Pouly
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*
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* Copyright (C) 2015 by the authors
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __HEADERGEN_STMP3600_DACDMA_H__
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#define __HEADERGEN_STMP3600_DACDMA_H__
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#define HW_DACDMA_CTRL HW(DACDMA_CTRL)
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#define HWA_DACDMA_CTRL (0x8004c000 + 0x0)
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#define HWT_DACDMA_CTRL HWIO_32_RW
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#define HWN_DACDMA_CTRL DACDMA_CTRL
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#define HWI_DACDMA_CTRL
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#define HW_DACDMA_CTRL_SET HW(DACDMA_CTRL_SET)
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#define HWA_DACDMA_CTRL_SET (HWA_DACDMA_CTRL + 0x4)
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#define HWT_DACDMA_CTRL_SET HWIO_32_WO
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#define HWN_DACDMA_CTRL_SET DACDMA_CTRL
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#define HWI_DACDMA_CTRL_SET
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#define HW_DACDMA_CTRL_CLR HW(DACDMA_CTRL_CLR)
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#define HWA_DACDMA_CTRL_CLR (HWA_DACDMA_CTRL + 0x8)
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#define HWT_DACDMA_CTRL_CLR HWIO_32_WO
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#define HWN_DACDMA_CTRL_CLR DACDMA_CTRL
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#define HWI_DACDMA_CTRL_CLR
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#define HW_DACDMA_CTRL_TOG HW(DACDMA_CTRL_TOG)
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#define HWA_DACDMA_CTRL_TOG (HWA_DACDMA_CTRL + 0xc)
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#define HWT_DACDMA_CTRL_TOG HWIO_32_WO
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#define HWN_DACDMA_CTRL_TOG DACDMA_CTRL
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#define HWI_DACDMA_CTRL_TOG
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#define BP_DACDMA_CTRL_SFTRST 31
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#define BM_DACDMA_CTRL_SFTRST 0x80000000
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#define BF_DACDMA_CTRL_SFTRST(v) (((v) & 0x1) << 31)
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#define BFM_DACDMA_CTRL_SFTRST(v) BM_DACDMA_CTRL_SFTRST
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#define BF_DACDMA_CTRL_SFTRST_V(e) BF_DACDMA_CTRL_SFTRST(BV_DACDMA_CTRL_SFTRST__##e)
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#define BFM_DACDMA_CTRL_SFTRST_V(v) BM_DACDMA_CTRL_SFTRST
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#define BP_DACDMA_CTRL_CLKGATE 30
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#define BM_DACDMA_CTRL_CLKGATE 0x40000000
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#define BF_DACDMA_CTRL_CLKGATE(v) (((v) & 0x1) << 30)
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#define BFM_DACDMA_CTRL_CLKGATE(v) BM_DACDMA_CTRL_CLKGATE
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#define BF_DACDMA_CTRL_CLKGATE_V(e) BF_DACDMA_CTRL_CLKGATE(BV_DACDMA_CTRL_CLKGATE__##e)
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#define BFM_DACDMA_CTRL_CLKGATE_V(v) BM_DACDMA_CTRL_CLKGATE
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#define BP_DACDMA_CTRL_RUN 0
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#define BM_DACDMA_CTRL_RUN 0x1
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#define BF_DACDMA_CTRL_RUN(v) (((v) & 0x1) << 0)
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#define BFM_DACDMA_CTRL_RUN(v) BM_DACDMA_CTRL_RUN
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#define BF_DACDMA_CTRL_RUN_V(e) BF_DACDMA_CTRL_RUN(BV_DACDMA_CTRL_RUN__##e)
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#define BFM_DACDMA_CTRL_RUN_V(v) BM_DACDMA_CTRL_RUN
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#define HW_DACDMA_DATA HW(DACDMA_DATA)
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#define HWA_DACDMA_DATA (0x8004c000 + 0x80)
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#define HWT_DACDMA_DATA HWIO_32_RW
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#define HWN_DACDMA_DATA DACDMA_DATA
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#define HWI_DACDMA_DATA
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#define BP_DACDMA_DATA_HIGH 16
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#define BM_DACDMA_DATA_HIGH 0xffff0000
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#define BF_DACDMA_DATA_HIGH(v) (((v) & 0xffff) << 16)
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#define BFM_DACDMA_DATA_HIGH(v) BM_DACDMA_DATA_HIGH
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#define BF_DACDMA_DATA_HIGH_V(e) BF_DACDMA_DATA_HIGH(BV_DACDMA_DATA_HIGH__##e)
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#define BFM_DACDMA_DATA_HIGH_V(v) BM_DACDMA_DATA_HIGH
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#define BP_DACDMA_DATA_LOW 0
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#define BM_DACDMA_DATA_LOW 0xffff
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#define BF_DACDMA_DATA_LOW(v) (((v) & 0xffff) << 0)
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#define BFM_DACDMA_DATA_LOW(v) BM_DACDMA_DATA_LOW
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#define BF_DACDMA_DATA_LOW_V(e) BF_DACDMA_DATA_LOW(BV_DACDMA_DATA_LOW__##e)
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#define BFM_DACDMA_DATA_LOW_V(v) BM_DACDMA_DATA_LOW
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#endif /* __HEADERGEN_STMP3600_DACDMA_H__*/
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