/*************************************************************************** * __________ __ ___. * Open \______ \ ____ ____ | | _\_ |__ _______ ___ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ * \/ \/ \/ \/ \/ * This file was automatically generated by headergen, DO NOT EDIT it. * headergen version: 3.0.0 * stmp3600 version: 2.4.0 * stmp3600 authors: Amaury Pouly * * Copyright (C) 2015 by the authors * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY * KIND, either express or implied. * ****************************************************************************/ #ifndef __HEADERGEN_STMP3600_DACDMA_H__ #define __HEADERGEN_STMP3600_DACDMA_H__ #define HW_DACDMA_CTRL HW(DACDMA_CTRL) #define HWA_DACDMA_CTRL (0x8004c000 + 0x0) #define HWT_DACDMA_CTRL HWIO_32_RW #define HWN_DACDMA_CTRL DACDMA_CTRL #define HWI_DACDMA_CTRL #define HW_DACDMA_CTRL_SET HW(DACDMA_CTRL_SET) #define HWA_DACDMA_CTRL_SET (HWA_DACDMA_CTRL + 0x4) #define HWT_DACDMA_CTRL_SET HWIO_32_WO #define HWN_DACDMA_CTRL_SET DACDMA_CTRL #define HWI_DACDMA_CTRL_SET #define HW_DACDMA_CTRL_CLR HW(DACDMA_CTRL_CLR) #define HWA_DACDMA_CTRL_CLR (HWA_DACDMA_CTRL + 0x8) #define HWT_DACDMA_CTRL_CLR HWIO_32_WO #define HWN_DACDMA_CTRL_CLR DACDMA_CTRL #define HWI_DACDMA_CTRL_CLR #define HW_DACDMA_CTRL_TOG HW(DACDMA_CTRL_TOG) #define HWA_DACDMA_CTRL_TOG (HWA_DACDMA_CTRL + 0xc) #define HWT_DACDMA_CTRL_TOG HWIO_32_WO #define HWN_DACDMA_CTRL_TOG DACDMA_CTRL #define HWI_DACDMA_CTRL_TOG #define BP_DACDMA_CTRL_SFTRST 31 #define BM_DACDMA_CTRL_SFTRST 0x80000000 #define BF_DACDMA_CTRL_SFTRST(v) (((v) & 0x1) << 31) #define BFM_DACDMA_CTRL_SFTRST(v) BM_DACDMA_CTRL_SFTRST #define BF_DACDMA_CTRL_SFTRST_V(e) BF_DACDMA_CTRL_SFTRST(BV_DACDMA_CTRL_SFTRST__##e) #define BFM_DACDMA_CTRL_SFTRST_V(v) BM_DACDMA_CTRL_SFTRST #define BP_DACDMA_CTRL_CLKGATE 30 #define BM_DACDMA_CTRL_CLKGATE 0x40000000 #define BF_DACDMA_CTRL_CLKGATE(v) (((v) & 0x1) << 30) #define BFM_DACDMA_CTRL_CLKGATE(v) BM_DACDMA_CTRL_CLKGATE #define BF_DACDMA_CTRL_CLKGATE_V(e) BF_DACDMA_CTRL_CLKGATE(BV_DACDMA_CTRL_CLKGATE__##e) #define BFM_DACDMA_CTRL_CLKGATE_V(v) BM_DACDMA_CTRL_CLKGATE #define BP_DACDMA_CTRL_RUN 0 #define BM_DACDMA_CTRL_RUN 0x1 #define BF_DACDMA_CTRL_RUN(v) (((v) & 0x1) << 0) #define BFM_DACDMA_CTRL_RUN(v) BM_DACDMA_CTRL_RUN #define BF_DACDMA_CTRL_RUN_V(e) BF_DACDMA_CTRL_RUN(BV_DACDMA_CTRL_RUN__##e) #define BFM_DACDMA_CTRL_RUN_V(v) BM_DACDMA_CTRL_RUN #define HW_DACDMA_DATA HW(DACDMA_DATA) #define HWA_DACDMA_DATA (0x8004c000 + 0x80) #define HWT_DACDMA_DATA HWIO_32_RW #define HWN_DACDMA_DATA DACDMA_DATA #define HWI_DACDMA_DATA #define BP_DACDMA_DATA_HIGH 16 #define BM_DACDMA_DATA_HIGH 0xffff0000 #define BF_DACDMA_DATA_HIGH(v) (((v) & 0xffff) << 16) #define BFM_DACDMA_DATA_HIGH(v) BM_DACDMA_DATA_HIGH #define BF_DACDMA_DATA_HIGH_V(e) BF_DACDMA_DATA_HIGH(BV_DACDMA_DATA_HIGH__##e) #define BFM_DACDMA_DATA_HIGH_V(v) BM_DACDMA_DATA_HIGH #define BP_DACDMA_DATA_LOW 0 #define BM_DACDMA_DATA_LOW 0xffff #define BF_DACDMA_DATA_LOW(v) (((v) & 0xffff) << 0) #define BFM_DACDMA_DATA_LOW(v) BM_DACDMA_DATA_LOW #define BF_DACDMA_DATA_LOW_V(e) BF_DACDMA_DATA_LOW(BV_DACDMA_DATA_LOW__##e) #define BFM_DACDMA_DATA_LOW_V(v) BM_DACDMA_DATA_LOW #endif /* __HEADERGEN_STMP3600_DACDMA_H__*/