Implement cache aligned transfer of more than one sectors. The
current code now transfers almost all data at once by moving
it within the buffer to make it cache aligned. This greatly
improves the performance of the transfers, especially in mass
storage mode.
Change-Id: Ic6e78773302f368426209f6fd6099089ea34cb16
Further merge drivers by using the same command and data functions.
No use one mutex per drive instead of a global sd lock. Fix the
RCA handling which was different between SD and MMC (shifted 16)
and thus confusing. Add MMC commands definition to the mmc.h
header similarly to the SD one. Change MMC handling a bit by
selecting/deselecting on each transfer like SD, which allows
for several MMC devices in theory and is more uniform.
Change-Id: I7024cb19c079553806138ead75b00640f1d2d95c
Merge sd and mmc drivers into a single sdmmc driver. This allows
some factoring of the code and simplify bug fixing. Also fix the
dma/cache related issue by doing all transfers via a correctly
aligned buffer. The current code is not smart enough to take
advantage of large user buffers currently but at least it is safe!
Change-Id: Ib0fd16dc7d52ef7bfe99fd586e03ecf08691edcd
There are tricky DMA/cache related issue on the imx233 which could
pop up with the old driver. The new one ensures that all dma
tranfers are cache safe by using an intermediate buffer.
Change-Id: I72060682d1c285c83ae16455cfdb62f372b5d687
Reduce DMA maximum transfer size since transfering 64Kb requires
to set a size of 0 and it's not worth adding checks everywhere
to handle this special case. Also add statistics about unaligned
transfer (wrt to cache). Update debug screen accordingly and
simplify it so it can fit smaller screens too.
Change-Id: I18391702f5e100a21f6f8d1ebab28d9f2bd8c66f
operation.
The interal ROM clock seems to be needed to reboot the player, so disabling
it is too dangerous. Hopefully this will prevent problems where crashes during
the abort handler resulted in a stock player that needed the battery to drain
in order to reboot.
Change-Id: I7d1e64743dde15b64d718ad3255dada3d570736f
Apparently I got the "just-in-case" RXFIFO purge in there before the
RXFIFO was enabled, causing severe hardware spasms.
Change-Id: I2ea4b6d28e06372b61cb3f21ab2fce71dd408213
Implement PLL enabling/disable and unconditionally power the PLL
on startup. This is needed at least on the Zen X-Fi2.
Change-Id: Ib9ddfdeaf973cedded4b3586dd16aa95a61e78ba
Because DMA descriptors needs to be committed and discarded from
the cache, if they are not cache aligned and/or if their size
is not a multiple of cache ligne, nasty side effects could occur
with adjacents data. The same applies to DMA buffers which are
still potentially broken. Add a macro to ensure that these
constraints will not break by error in the future.
Change-Id: I1dd69a5a9c29796c156d953eaa57c0d281e79846
Sometimes I do want to update outside the screen boundaries and it was
messing it up; such things should not cause display problems.
Change-Id: Ic9deec609b19e5a1c603601b20c66599dd44f892
The freescale firmware partitions has a lots of quirks that
need to be dealt with, so do it the proper way.
Change-Id: I8a5bd3fb462a4df143bc6c931057f3ffedd4b3d3
The icoll code now has an IRQ storm detection mechanism which
will prevent the device from hard freezing in case it happen.
Change-Id: I9861238dce61d29af1e48f9c534ec63a7f23465c
I successfully identified the STC/RDS pin as B2P27.
Strangely the OF uses polling instead of interrupts
but since they routed it, let's use it! On the fuze+
the fmradio i2c uses bit toggling so we can't read
the RDS data in the interrupt context. Instead we
defer the work to a thread.
Change-Id: Iedfa425320e6c91b4351b72e97c732696bdb2b73
Reviewed-on: http://gerrit.rockbox.org/236
Reviewed-by: Bertrik Sikken <bertrik@sikken.nl>
Reviewed-by: Amaury Pouly <amaury.pouly@gmail.com>
Past development has proved that one can mistakely use
the same pin for two uses without noticing. Since this
causes extremely hard to find bugs, the infrastructure
will allow to register pin uses and panic when a conflict
is detected. The pinctrl debug now shows the pin uses
when its support is compiled in.
Change-Id: Idb2d5235ce09207d77aa474d6f158e72b933761a
It was only needed by the old arm toolchain that we no longer use or support.
Change-Id: Id0e6c67477f8834a637079b03cde5fbf9da68b1c
Reviewed-on: http://gerrit.rockbox.org/233
Reviewed-by: Nils Wallménius <nils@rockbox.org>
Player-specific code remaining: usb_drv_(init,exit)
The iPods lack a MMU, so:
- physical, virtual, and uncached addresses are identical
- since we can't access uncached memory we discard caches when receiving data
Still not quite reliable on nano2g
Change-Id: Iebb79df64818b9ae3b68eccb8be8975ebd6c21ea
- Add BUTTON_POWER.
- hm60x: Rename BUTTON_PLAY to more proper BUTTON_SELECT, which will make it
possible to unify hm60x and hm801 keymaps in some plugins.
Change-Id: I84715cdbc79d00c1bc2e8e6bd492159ad3c3422b
Remove the implementations of all exceptions handlers from the
various crt0.S files and have a single implementation in system-arm.h
The new implementation is weak so that it can be overwritten by some
specific code (like the unwinder)
Change-Id: Ib3e041ed6037376bbe0e79286057e1051640dd90
Reviewed-on: http://gerrit.rockbox.org/205
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
This patch implements HAVE_ADJUSTABLE_CPU_FREQ, it modifies the
following parameters when CPU is unboosted:
- s5l8702 voltage is decreased: 1.200V -> 1.050V
- CPU frequency is divided by 4: 216MHz -> 54MHz
- AHB frequency is divided by 2: 108MHz -> 54MHz
Change-Id: I2285b83efb7e1567864ac288f2d4ba55f058f7c5
Configures GPIO ports to detect holdswitch status instead of
polling the PMU via I2C, this fixes some random crashes
Change-Id: I407c9ca4c2c9203842f9e774b1c8d0455d59048c
Reviewed-on: http://gerrit.rockbox.org/194
Reviewed-by: Michael Giacomelli <giac2000@hotmail.com>
For now it contains explicit SDRAM setup, cutting clock for unused
modules and turning off unused PLLs. This improves slightly mem
throughput as well as saves quite a bit of power.
Change-Id: I19a2827ac90a6868856c676fbe1e051c42f0d608
