Commit graph

4 commits

Author SHA1 Message Date
Michael Sevakis
d4800fa385 Coldfire: Fix the modification of IMR. Interrupts must be masked at the core level at at least the level of the interrupt being masked. Not following the datasheet and relying strictly on and/or_l causes unhandled 'Levelx' exceptions (showing itself quite often in PCM mixer work which more greatly stresses PCM lockout).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30009 a1c6a512-1295-4272-9138-f99709370657
2011-06-17 03:09:47 +00:00
Rafaël Carré
ffefe0c08b Put TIMER_FREQ definition in CPU-specific config, and remove timer-target.h
Note : SH has TIMER_FREQ defined to CPU_FREQ, so any code wanting it must include #config.h before #cpu.h

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21560 a1c6a512-1295-4272-9138-f99709370657
2009-06-29 14:30:12 +00:00
Rafaël Carré
c5dedd7d76 Remove the TIMER_* macros and declare target-specific functions in timer.h
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21559 a1c6a512-1295-4272-9138-f99709370657
2009-06-29 14:29:57 +00:00
Rafaël Carré
c34ca87b64 Move coldfire timer code in the target tree
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21555 a1c6a512-1295-4272-9138-f99709370657
2009-06-29 14:29:06 +00:00