c34ca87b64
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21555 a1c6a512-1295-4272-9138-f99709370657
119 lines
3.1 KiB
C
119 lines
3.1 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2005 Jens Arnold
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <stdlib.h>
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#include "config.h"
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#include "system.h"
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#include "cpu.h"
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#include "timer.h"
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#include "timer-target.h"
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static int base_prescale;
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void TIMER1(void) __attribute__ ((interrupt_handler));
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void TIMER1(void)
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{
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if (pfn_timer != NULL)
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pfn_timer();
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TER1 = 0xff; /* clear all events */
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}
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bool __timer_set(long cycles, bool start)
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{
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int phi = 0; /* bits for the prescaler */
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int prescale = 1;
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while (cycles > 0x10000)
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{
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prescale <<= 1;
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cycles >>= 1;
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}
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if (prescale > 4096/CPUFREQ_MAX_MULT)
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return false;
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if (prescale > 256/CPUFREQ_MAX_MULT)
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{
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phi = 0x05; /* prescale sysclk/16, timer enabled */
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prescale >>= 4;
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}
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else
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phi = 0x03; /* prescale sysclk, timer enabled */
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base_prescale = prescale;
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prescale *= (cpu_frequency / CPU_FREQ);
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if (start)
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{
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if (pfn_unregister != NULL)
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{
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pfn_unregister();
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pfn_unregister = NULL;
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}
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phi &= ~1; /* timer disabled at start */
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/* If it is already enabled, writing a 0 to the RST bit will clear
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the register, so we clear RST explicitly before writing the real
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data. */
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TMR1 = 0;
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}
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/* We are using timer 1 */
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TMR1 = 0x0018 | (unsigned short)phi | ((unsigned short)(prescale - 1) << 8);
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TRR1 = (unsigned short)(cycles - 1);
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if (start || (TCN1 >= TRR1))
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TCN1 = 0; /* reset the timer */
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TER1 = 0xff; /* clear all events */
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return true;
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}
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bool __timer_start(void)
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{
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ICR2 = 0x90; /* interrupt on level 4.0 */
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and_l(~(1<<10), &IMR);
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TMR1 |= 1; /* start timer */
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return true;
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}
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void __timer_stop(void)
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{
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TMR1 = 0; /* disable timer 1 */
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or_l((1<<10), &IMR); /* disable interrupt */
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}
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void timers_adjust_prescale(int multiplier, bool enable_irq)
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{
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/* tick timer */
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TMR0 = (TMR0 & 0x00ef)
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| ((unsigned short)(multiplier - 1) << 8)
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| (enable_irq ? 0x10 : 0);
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if (pfn_timer)
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{
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/* user timer */
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int prescale = base_prescale * multiplier;
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TMR1 = (TMR1 & 0x00ef)
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| ((unsigned short)(prescale - 1) << 8)
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| (enable_irq ? 0x10 : 0);
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}
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}
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