With a few modifications by me:
Return 0MHz for PLL disabled (PLLB)
Mention if i2si and i2so are on or off
Simplify scrolling (for small & large displays)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20987 a1c6a512-1295-4272-9138-f99709370657
i2c clock frequency uses pclk as reference, not plla
i2c clock divider is only 10 bits, not 16
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20929 a1c6a512-1295-4272-9138-f99709370657
Inline the 2 uses, and use a preprocessor sanity check for identification frequency
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20924 a1c6a512-1295-4272-9138-f99709370657
Fix CGU_DBOP setting
Set PCLK to the exact frequency (62MHz, not the maximal frequency)
Use a better comment for CLK_DIV macro
Use preprocessor safety checks for clock divider sizes to avoid future mistakes (not for SD_IDENT frequency since that check is handled by mci_set_clock_divider)
Use maximal IDE frequency of 66MHz (like OF), not 90MHz like written in AS3525 datasheet. The IDE chip is somehow linked to internal storage, and a too high frequency could affect the storage driver.
Use the same DBOP frequency of 32MHz for all models (like OF, verified clip, fuze, e200v2 and m200v4), compromise between performance and battery life could be added in the future for each target
Performance increase on Sansa Fuze with DBOP freq. set to 64MHz: +12% fps for lcd_update, +1% fps for yuv
Thanks to daytona955 on the forums for his help
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20923 a1c6a512-1295-4272-9138-f99709370657
Fixes various storage related problems like stuttering audio, md5sum and test disk failure and Sansa Fuze's backdrop corruption by using aligned buffers. There's a speed penalty but stability has more priority.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20679 a1c6a512-1295-4272-9138-f99709370657
Activates IRAM for AMS Sansas to be used by codecs and core. Fixes Reboot-on-mp3 and gives speed up on codecs using IRAM in general.
I've made a change: the core/codec ratio is 0x20000/0x30000 instead of 0x10000/0x40000, 0x30000 is way more than codecs currently use (0x14000 at max) and the core might need more than 0x10000.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20678 a1c6a512-1295-4272-9138-f99709370657
DMAC_INT_TC_CLEAR is a write-only reg
HIGH bits of DMAC_SYNC mean synchronisation logic disabled.
Also, according to the OF and to tests, all the peripherals we use run at the same frequency (PCLK?).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20643 a1c6a512-1295-4272-9138-f99709370657
the AMS sansas, which solves the ">2GB problem" (the problem that we could not
access data past 1GB on devices having more than 2GB internal storage).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20577 a1c6a512-1295-4272-9138-f99709370657
a) lcd_enabled() is now lcd_active(), and is available for HAVE_LCD_SLEEP only targets (e.g. ipod video) too. It was depandent on HAVE_LCD_ENALE only before
b) rename the hook accordingly, and implement the hook for other other targets too (e.g. the clip [the only mono target with lcd_enable/lcd_sleep yet, so the code is still in the lcd driver], ipod, fuze, c200)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20331 a1c6a512-1295-4272-9138-f99709370657
1) fix driver from reading invalid home button while lcd updates (use old value then)
2) put in a 1s delay for power button reading after releasing hold
3) revert r20028, I thought it wasn't needed, since I didn't update the bootloader
4) enable hold for the bootloader (even though not really needed, but is consistent with other targets)
5) let button_dbop return DBOP_DIN, and do the reading in button_read_device
6) various cleanups
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20054 a1c6a512-1295-4272-9138-f99709370657
1) put window addressing in a seperate function like on the fuze
2) use fb_data instead of unsigned short
3) change clipping a bit
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20051 a1c6a512-1295-4272-9138-f99709370657
