Jens Arnold
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83aded979f
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H300: (1) Use DMA for LCD updates, with auto-aligned line reads. Speeds up LCD updates by ~ 75% at 11MHz and 45MHz. Only ~ 11% speedup at 124MHz due to (2). (2) Less aggressive LCD transfer timing at 124MHz. With the previous timing, slightly corrupted display contents was reported, and with DMA transfers at least 4 waitstates are needed to make updates work at all. * A table in system-iriver.c shows settings for all integer multiples of the base clock frequency (info for developers, not yet complete).
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11418 a1c6a512-1295-4272-9138-f99709370657
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2006-11-02 20:50:50 +00:00 |
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Jens Arnold
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72f98786a0
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Fixup of the MCF5249 memory mapped register definitions.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7755 a1c6a512-1295-4272-9138-f99709370657
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2005-11-05 03:28:20 +00:00 |
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Linus Nielsen Feltzing
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fb5d2629a1
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Corrected UART register names
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7325 a1c6a512-1295-4272-9138-f99709370657
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2005-08-13 22:12:40 +00:00 |
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Andy
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e5d08722f8
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Iriver: First attempt at recording. Use Info->Debug->PCM recording to test recording of wav-files. Seams to work fine except occasional 100 ms noise at pos 100 ms (not later) so initialization or synch problem..
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6763 a1c6a512-1295-4272-9138-f99709370657
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2005-06-19 03:05:53 +00:00 |
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Linus Nielsen Feltzing
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cff83c78c7
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ColdFire: DCR is a 16-bit register
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6604 a1c6a512-1295-4272-9138-f99709370657
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2005-06-08 07:37:32 +00:00 |
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Linus Nielsen Feltzing
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752d0bb8be
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Added DMA register definitions
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6202 a1c6a512-1295-4272-9138-f99709370657
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2005-03-18 11:33:07 +00:00 |
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Linus Nielsen Feltzing
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e52e3f713f
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Correct size for the DCRx registers
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5993 a1c6a512-1295-4272-9138-f99709370657
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2005-02-16 22:14:36 +00:00 |
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Linus Nielsen Feltzing
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b57fd974de
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Correct size for the BCRx registers
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5992 a1c6a512-1295-4272-9138-f99709370657
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2005-02-16 22:10:47 +00:00 |
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Linus Nielsen Feltzing
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672092c6dc
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Made the Coldfire registers volatile, rename PLLCONTROL to PLLCR
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5941 a1c6a512-1295-4272-9138-f99709370657
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2005-02-14 21:30:30 +00:00 |
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Linus Nielsen Feltzing
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58462ab101
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The timer registers are 16-bit
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5364 a1c6a512-1295-4272-9138-f99709370657
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2004-10-27 06:50:00 +00:00 |
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Linus Nielsen Feltzing
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515d819d3e
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CPU definitions for MCF5249
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5183 a1c6a512-1295-4272-9138-f99709370657
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2004-10-06 13:25:56 +00:00 |
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