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Gigabeat S: Slow down the SPI clock to 1/8 current speed. It seems lower voltages can reveal the weakness that forbids maximum-speed clocking per the SPI spec. OF leaves it set much slower. Push it a bit over OF since it's been gotten away with fairly cleanly so far. Settings on pins and interface to be more thoroughly investigated.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25554 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2010-04-09 13:21:32 +00:00
parent bad4142ce2
commit eb755ec351
1 changed files with 1 additions and 1 deletions
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2
firmware/target/arm/imx31/mc13783-imx31.c
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@ -38,7 +38,7 @@ static struct spi_node mc13783_spi =
CSPI2_NUM, /* CSPI module 2 */
CSPI_CONREG_CHIP_SELECT_SS0 | /* Chip select 0 */
CSPI_CONREG_DRCTL_DONT_CARE | /* Don't care about CSPI_RDY */
CSPI_CONREG_DATA_RATE_DIV_4 | /* Clock = IPG_CLK/4 - 16.5MHz */
CSPI_CONREG_DATA_RATE_DIV_32 | /* Clock = IPG_CLK/32 = 2,062,500Hz. */
CSPI_BITCOUNT(32-1) | /* All 32 bits are to be transferred */
CSPI_CONREG_SSPOL | /* SS active high */
CSPI_CONREG_SSCTL | /* Negate SS between SPI bursts */