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imx233/fuze+: fix apps linker script, add comment in bootloader

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30436 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Amaury Pouly 2011-09-05 18:32:40 +00:00
parent 2052540972
commit 333b9ed2c3
2 changed files with 18 additions and 4 deletions
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2
bootloader/imx233.c
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@ -138,6 +138,8 @@ void main(uint32_t arg)
if(ret < 0) if(ret < 0)
error(EATA, ret, true); error(EATA, ret, true);
/* NOTE: allow disk_init and disk_mount_all to fail since we can do USB after.
* We need this order to determine the correct logical sector size */
while(!disk_init(IF_MV(0))) while(!disk_init(IF_MV(0)))
printf("disk_init failed!"); printf("disk_init failed!");

20
firmware/target/arm/imx233/app.lds
View file

@ -17,7 +17,7 @@ STARTUP(target/arm/imx233/crt0.o)
#define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - FRAME_SIZE - TTB_SIZE) #define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - FRAME_SIZE - TTB_SIZE)
/* End of the audio buffer, where the codec buffer starts */ /* End of the audio buffer, where the codec buffer starts */
#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) #define ENDAUDIOADDR (CACHED_DRAM_ADDR + DRAMSIZE)
/* Where the codec buffer ends, and the plugin buffer starts */ /* Where the codec buffer ends, and the plugin buffer starts */
#define ENDADDR (ENDAUDIOADDR + CODEC_SIZE) #define ENDADDR (ENDAUDIOADDR + CODEC_SIZE)
@ -29,15 +29,14 @@ STARTUP(target/arm/imx233/crt0.o)
MEMORY MEMORY
{ {
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE DRAM : ORIGIN = CACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
UNCACHED_DRAM : ORIGIN = UNCACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
} }
SECTIONS SECTIONS
{ {
.text : .text :
{ {
loadaddress = .;
_loadaddress = .;
*(.text*) *(.text*)
} > DRAM } > DRAM
@ -89,10 +88,23 @@ SECTIONS
stackend = .; stackend = .;
} > DRAM } > DRAM
/* treat .bss and .ncbss as a single section */
.bss (NOLOAD) : .bss (NOLOAD) :
{ {
_edata = .; _edata = .;
*(.bss*); *(.bss*);
} > DRAM
/* align on cache size boundary to avoid mixing cached and noncached stuff */
.ncbss . - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR (NOLOAD) :
{
. = ALIGN(CACHEALIGN_SIZE);
*(.ncbss*)
. = ALIGN(CACHEALIGN_SIZE);
} AT> DRAM
.bssendadr . - UNCACHED_DRAM_ADDR + CACHED_DRAM_ADDR (NOLOAD) :
{
_end = .; _end = .;
} > DRAM } > DRAM