From 333b9ed2c330bb005456444de0eb16ad422496fa Mon Sep 17 00:00:00 2001 From: Amaury Pouly Date: Mon, 5 Sep 2011 18:32:40 +0000 Subject: [PATCH] imx233/fuze+: fix apps linker script, add comment in bootloader git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30436 a1c6a512-1295-4272-9138-f99709370657 --- bootloader/imx233.c | 2 ++ firmware/target/arm/imx233/app.lds | 20 ++++++++++++++++---- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/bootloader/imx233.c b/bootloader/imx233.c index b0ca0c3b01..548bb3686f 100644 --- a/bootloader/imx233.c +++ b/bootloader/imx233.c @@ -138,6 +138,8 @@ void main(uint32_t arg) if(ret < 0) error(EATA, ret, true); + /* NOTE: allow disk_init and disk_mount_all to fail since we can do USB after. + * We need this order to determine the correct logical sector size */ while(!disk_init(IF_MV(0))) printf("disk_init failed!"); diff --git a/firmware/target/arm/imx233/app.lds b/firmware/target/arm/imx233/app.lds index 5b83fe1c14..a4fb8af0f1 100644 --- a/firmware/target/arm/imx233/app.lds +++ b/firmware/target/arm/imx233/app.lds @@ -17,7 +17,7 @@ STARTUP(target/arm/imx233/crt0.o) #define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - FRAME_SIZE - TTB_SIZE) /* End of the audio buffer, where the codec buffer starts */ -#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) +#define ENDAUDIOADDR (CACHED_DRAM_ADDR + DRAMSIZE) /* Where the codec buffer ends, and the plugin buffer starts */ #define ENDADDR (ENDAUDIOADDR + CODEC_SIZE) @@ -29,15 +29,14 @@ STARTUP(target/arm/imx233/crt0.o) MEMORY { IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE - DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE + DRAM : ORIGIN = CACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE + UNCACHED_DRAM : ORIGIN = UNCACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE } SECTIONS { .text : { - loadaddress = .; - _loadaddress = .; *(.text*) } > DRAM @@ -89,10 +88,23 @@ SECTIONS stackend = .; } > DRAM + /* treat .bss and .ncbss as a single section */ .bss (NOLOAD) : { _edata = .; *(.bss*); + } > DRAM + + /* align on cache size boundary to avoid mixing cached and noncached stuff */ + .ncbss . - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR (NOLOAD) : + { + . = ALIGN(CACHEALIGN_SIZE); + *(.ncbss*) + . = ALIGN(CACHEALIGN_SIZE); + } AT> DRAM + + .bssendadr . - UNCACHED_DRAM_ADDR + CACHED_DRAM_ADDR (NOLOAD) : + { _end = .; } > DRAM