2021-02-27 22:08:58 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2021 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __GPIO_X1000_H__
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#define __GPIO_X1000_H__
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#include "x1000/gpio.h"
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/* GPIO port numbers */
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#define GPIO_A 0
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#define GPIO_B 1
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#define GPIO_C 2
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#define GPIO_D 3
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#define GPIO_Z 7
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/* GPIO function bits */
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#define GPIO_F_PULL 16
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#define GPIO_F_INT 8
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#define GPIO_F_MASK 4
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#define GPIO_F_PAT1 2
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#define GPIO_F_PAT0 1
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/* GPIO function numbers */
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2021-06-04 23:12:01 +00:00
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#define GPIOF_DEVICE(i) ((i)&3)
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#define GPIOF_OUTPUT(i) (0x4|((i)&1))
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#define GPIOF_INPUT 0x16
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#define GPIOF_IRQ_LEVEL(i) (0x1c|((i)&1))
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#define GPIOF_IRQ_EDGE(i) (0x1e|((i)&1))
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/* GPIO pin numbers */
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#define GPION_CREATE(port, pin) ((((port) & 3) << 5) | ((pin) & 0x1f))
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#define GPION_PORT(gpio) (((gpio) >> 5) & 3)
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#define GPION_PIN(gpio) ((gpio) & 0x1f)
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#define GPION_MASK(gpio) (1u << GPION_PIN(gpio))
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/* Easy pin number macros */
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#define GPIO_PA(x) GPION_CREATE(GPIO_A, x)
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#define GPIO_PB(x) GPION_CREATE(GPIO_B, x)
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#define GPIO_PC(x) GPION_CREATE(GPIO_C, x)
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#define GPIO_PD(x) GPION_CREATE(GPIO_D, x)
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/* Pingroup settings are used for system devices */
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struct pingroup_setting {
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int port;
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uint32_t pins;
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int func;
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};
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/* GPIO settings are used for single pins under software control */
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struct gpio_setting {
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int gpio;
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int func;
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};
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/* Target pins are defined as GPIO_XXX constants usable with the GPIO API */
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enum {
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#define DEFINE_GPIO(_name, _gpio, _func) GPIO_##_name = _gpio,
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#define DEFINE_PINGROUP(...)
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#include "gpio-target.h"
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#undef DEFINE_GPIO
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#undef DEFINE_PINGROUP
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GPIO_NONE = -1,
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};
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/* These are pin IDs which index gpio_settings */
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enum {
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#define DEFINE_GPIO(_name, ...) PIN_##_name,
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#define DEFINE_PINGROUP(...)
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#include "gpio-target.h"
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#undef DEFINE_GPIO
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#undef DEFINE_PINGROUP
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PIN_COUNT,
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};
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/* Pingroup IDs which index pingroup_settings */
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enum {
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#define DEFINE_GPIO(...)
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#define DEFINE_PINGROUP(_name, ...) PINGROUP_##_name,
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#include "gpio-target.h"
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#undef DEFINE_GPIO
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#undef DEFINE_PINGROUP
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PINGROUP_COUNT,
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};
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/* arrays which define the target's GPIO settings */
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extern const struct gpio_setting gpio_settings[PIN_COUNT];
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extern const struct pingroup_setting pingroup_settings[PINGROUP_COUNT];
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2021-02-27 22:08:58 +00:00
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2021-06-04 23:12:01 +00:00
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/* stringified names for use in debug menus */
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extern const char* const gpio_names[PIN_COUNT];
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extern const char* const pingroup_names[PINGROUP_COUNT];
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/* called at early init to set up GPIOs */
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2021-02-27 22:08:58 +00:00
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extern void gpio_init(void);
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2021-06-04 23:12:01 +00:00
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/* Use GPIO Z to reconfigure several pins atomically */
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extern void gpioz_configure(int port, uint32_t pins, int func);
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static inline void gpio_set_function(int gpio, int func)
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{
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gpioz_configure(GPION_PORT(gpio), GPION_MASK(gpio), func);
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}
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static inline int gpio_get_level(int gpio)
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{
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return REG_GPIO_PIN(GPION_PORT(gpio)) & GPION_MASK(gpio) ? 1 : 0;
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}
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static inline void gpio_set_level(int gpio, int value)
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2021-02-27 22:08:58 +00:00
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{
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2021-06-04 23:12:01 +00:00
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if(value)
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jz_set(GPIO_PAT0(GPION_PORT(gpio)), GPION_MASK(gpio));
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2021-02-27 22:08:58 +00:00
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else
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2021-06-04 23:12:01 +00:00
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jz_clr(GPIO_PAT0(GPION_PORT(gpio)), GPION_MASK(gpio));
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2021-02-27 22:08:58 +00:00
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}
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2021-06-04 23:12:01 +00:00
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static inline void gpio_set_pull(int gpio, int state)
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{
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if(state)
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jz_set(GPIO_PULL(GPION_PORT(gpio)), GPION_MASK(gpio));
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else
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jz_clr(GPIO_PULL(GPION_PORT(gpio)), GPION_MASK(gpio));
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}
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2021-02-27 22:08:58 +00:00
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2021-06-04 23:12:01 +00:00
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static inline void gpio_mask_irq(int gpio, int mask)
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{
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2021-06-04 23:12:01 +00:00
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if(mask)
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jz_set(GPIO_MSK(GPION_PORT(gpio)), GPION_MASK(gpio));
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2021-02-27 22:08:58 +00:00
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else
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2021-06-04 23:12:01 +00:00
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jz_clr(GPIO_MSK(GPION_PORT(gpio)), GPION_MASK(gpio));
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2021-02-27 22:08:58 +00:00
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}
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2021-06-04 23:12:01 +00:00
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#define gpio_set_irq_level gpio_set_level
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#define gpio_enable_irq(gpio) gpio_mask_irq((gpio), 0)
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#define gpio_disable_irq(gpio) gpio_mask_irq((gpio), 1)
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2021-02-27 22:08:58 +00:00
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2021-06-04 23:12:01 +00:00
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/* Helper function for edge-triggered IRQs when you want to get an
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* interrupt on both the rising and falling edges. The hardware can
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* only be set up to interrupt on one edge, so interrupt handlers
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* can call this function to flip the trigger to the other edge.
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*
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* Despite the name, this doesn't depend on the currently set edge,
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* it just reads the GPIO state and sets up an edge trigger to detect
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* a change to the other state -- if some transitions were missed the
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* IRQ trigger may remain unchanged.
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*
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* It can be safely used to initialize the IRQ level.
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*/
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static inline void gpio_flip_edge_irq(int gpio)
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{
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if(gpio_get_level(gpio))
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gpio_set_irq_level(gpio, 0);
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2021-02-27 22:08:58 +00:00
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else
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2021-06-04 23:12:01 +00:00
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gpio_set_irq_level(gpio, 1);
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2021-02-27 22:08:58 +00:00
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}
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#endif /* __GPIO_X1000_H__ */
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