2005-11-14 20:41:49 +00:00
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2004 by Linus Nielsen Feltzing
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*
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2008-06-28 18:10:04 +00:00
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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2005-11-14 20:41:49 +00:00
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include "lcd.h"
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#include "kernel.h"
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#include "thread.h"
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#include <string.h>
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#include <stdlib.h>
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#include "file.h"
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#include "debug.h"
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#include "system.h"
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#include "font.h"
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#include "bidi.h"
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2009-10-11 13:30:06 +00:00
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static bool display_on = false; /* Is the display turned on? */
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2006-03-17 15:42:06 +00:00
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static bool display_flipped = false;
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2009-10-11 13:30:06 +00:00
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static int xoffset = 0; /* Needed for flip */
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static struct mutex lcd_mtx; /* The update functions use DMA and yield */
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unsigned long dma_addr IBSS_ATTR;
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unsigned int dma_len IBSS_ATTR;
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volatile int dma_count IBSS_ATTR;
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2005-12-20 23:15:27 +00:00
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/* register defines */
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#define R_START_OSC 0x00
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#define R_DRV_OUTPUT_CONTROL 0x01
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#define R_DRV_WAVEFORM_CONTROL 0x02
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#define R_ENTRY_MODE 0x03
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#define R_COMPARE_REG1 0x04
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#define R_COMPARE_REG2 0x05
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#define R_DISP_CONTROL1 0x07
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#define R_DISP_CONTROL2 0x08
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#define R_DISP_CONTROL3 0x09
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#define R_FRAME_CYCLE_CONTROL 0x0b
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#define R_EXT_DISP_IF_CONTROL 0x0c
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#define R_POWER_CONTROL1 0x10
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#define R_POWER_CONTROL2 0x11
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#define R_POWER_CONTROL3 0x12
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#define R_POWER_CONTROL4 0x13
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#define R_RAM_ADDR_SET 0x21
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#define R_WRITE_DATA_2_GRAM 0x22
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#define R_GAMMA_FINE_ADJ_POS1 0x30
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#define R_GAMMA_FINE_ADJ_POS2 0x31
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#define R_GAMMA_FINE_ADJ_POS3 0x32
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#define R_GAMMA_GRAD_ADJ_POS 0x33
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#define R_GAMMA_FINE_ADJ_NEG1 0x34
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#define R_GAMMA_FINE_ADJ_NEG2 0x35
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#define R_GAMMA_FINE_ADJ_NEG3 0x36
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#define R_GAMMA_GRAD_ADJ_NEG 0x37
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#define R_GAMMA_AMP_ADJ_RES_POS 0x38
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#define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
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#define R_GATE_SCAN_POS 0x40
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#define R_VERT_SCROLL_CONTROL 0x41
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#define R_1ST_SCR_DRV_POS 0x42
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#define R_2ND_SCR_DRV_POS 0x43
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#define R_HORIZ_RAM_ADDR_POS 0x44
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#define R_VERT_RAM_ADDR_POS 0x45
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2006-08-08 13:44:43 +00:00
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#define LCD_CMD (*(volatile unsigned short *)0xf0000000)
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#define LCD_DATA (*(volatile unsigned short *)0xf0000002)
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2005-12-20 23:15:27 +00:00
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2007-10-14 23:05:56 +00:00
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#define R_ENTRY_MODE_HORZ 0x7030
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#define R_ENTRY_MODE_VERT 0x7038
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2005-12-20 23:15:27 +00:00
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/* called very frequently - inline! */
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2006-02-05 00:24:08 +00:00
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static inline void lcd_write_reg(int reg, int val)
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2005-11-14 20:41:49 +00:00
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{
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2006-08-08 13:44:43 +00:00
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LCD_CMD = reg;
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LCD_DATA = val;
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2005-11-14 20:41:49 +00:00
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}
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2005-12-20 23:15:27 +00:00
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/* called very frequently - inline! */
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2006-02-05 00:24:08 +00:00
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static inline void lcd_begin_write_gram(void)
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2005-11-14 20:41:49 +00:00
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{
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2006-08-08 13:44:43 +00:00
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LCD_CMD = R_WRITE_DATA_2_GRAM;
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2005-11-14 20:41:49 +00:00
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}
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/*** hardware configuration ***/
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void lcd_set_contrast(int val)
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{
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(void)val;
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}
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void lcd_set_invert_display(bool yesno)
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{
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(void)yesno;
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}
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2006-03-17 15:42:06 +00:00
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static void flip_lcd(bool yesno)
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2005-11-14 20:41:49 +00:00
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{
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2006-03-17 15:42:06 +00:00
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if (yesno)
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{
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lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x031b); /* 224 lines, GS=SS=1 */
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lcd_write_reg(R_GATE_SCAN_POS, 0x0002); /* 16 lines offset */
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lcd_write_reg(R_1ST_SCR_DRV_POS, 0xdf04); /* 4..223 */
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}
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else
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{
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lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x001b); /* 224 lines, GS=SS=0 */
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lcd_write_reg(R_GATE_SCAN_POS, 0x0000);
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lcd_write_reg(R_1ST_SCR_DRV_POS, 0xdb00); /* 0..219 */
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}
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2005-11-14 20:41:49 +00:00
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}
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2006-03-17 15:42:06 +00:00
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/* turn the display upside down (call lcd_update() afterwards) */
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void lcd_set_flip(bool yesno)
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2005-11-14 20:41:49 +00:00
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{
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2006-03-17 15:42:06 +00:00
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display_flipped = yesno;
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xoffset = yesno ? 4 : 0;
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2005-11-14 20:41:49 +00:00
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2006-03-17 15:42:06 +00:00
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if (display_on)
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2009-10-11 13:30:06 +00:00
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{
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mutex_lock(&lcd_mtx);
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2006-03-17 15:42:06 +00:00
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flip_lcd(yesno);
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2009-10-11 13:30:06 +00:00
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mutex_unlock(&lcd_mtx);
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}
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2006-03-17 15:42:06 +00:00
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}
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2005-11-14 20:41:49 +00:00
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2006-03-17 15:42:06 +00:00
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static void _display_on(void)
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{
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/** Sequence according to datasheet, p. 132 **/
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_START_OSC, 0x0001); /* Start Oscilation */
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2006-03-17 15:42:06 +00:00
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/* zero everything*/
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lcd_write_reg(R_POWER_CONTROL1, 0x0000); /* STB = 0, SLP = 0 */
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lcd_write_reg(R_DISP_CONTROL1, 0x0000); /* GON = 0, DTE = 0, D1-0 = 00b */
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lcd_write_reg(R_POWER_CONTROL3, 0x0000); /* PON = 0 */
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lcd_write_reg(R_POWER_CONTROL4, 0x0000); /* VCOMG = 0 */
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2006-03-17 15:42:06 +00:00
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/* initialise power supply */
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2005-12-20 23:15:27 +00:00
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2006-03-17 15:42:06 +00:00
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/* DC12-10 = 000b: Step-up1 = clock/8,
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* DC02-00 = 000b: Step-up2 = clock/16,
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* VC2-0 = 010b: VciOUT = 0.87 * VciLVL */
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lcd_write_reg(R_POWER_CONTROL2, 0x0002);
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2005-12-20 23:15:27 +00:00
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2006-03-17 15:42:06 +00:00
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/* VRH3-0 = 1000b: Vreg1OUT = REGP * 1.90 */
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lcd_write_reg(R_POWER_CONTROL3, 0x0008);
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/* VDV4-0 = 00110b: VcomA = Vreg1OUT * 0.76,
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* VCM4-0 = 10000b: VcomH = Vreg1OUT * 0.70*/
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lcd_write_reg(R_POWER_CONTROL4, 0x0610);
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lcd_write_reg(R_POWER_CONTROL1, 0x0044); /* AP2-0 = 100b, DK = 1 */
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lcd_write_reg(R_POWER_CONTROL3, 0x0018); /* PON = 1 */
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sleep(4); /* Step-up circuit stabilising time */
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/* start power supply */
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lcd_write_reg(R_POWER_CONTROL1, 0x0540); /* BT2-0 = 101b, DK = 0 */
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lcd_write_reg(R_POWER_CONTROL4, 0x2610); /* VCOMG = 1 */
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/* other settings */
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/* B/C = 1: n-line inversion form
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* EOR = 1: polarity inversion occurs by applying an EOR to odd/even
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* frame select signal and an n-line inversion signal.
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* FLD = 01b: 1 field interlaced scan, external display iface */
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_DRV_WAVEFORM_CONTROL, 0x0700);
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/* Address counter updated in vertical direction; left to right;
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* vertical increment horizontal increment.
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* data format for 8bit transfer or spi = 65k (5,6,5)
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* Reverse order of RGB to BGR for 18bit data written to GRAM
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* Replace data on writing to GRAM */
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lcd_write_reg(R_ENTRY_MODE, 0x7038);
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2006-03-17 15:42:06 +00:00
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flip_lcd(display_flipped);
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_2ND_SCR_DRV_POS, 0x0000);
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2006-03-17 15:42:06 +00:00
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lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000);
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2005-12-20 23:15:27 +00:00
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/* 19 clocks,no equalization */
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lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x0002);
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/* Transfer mode for RGB interface disabled
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* internal clock operation;
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2006-03-17 15:42:06 +00:00
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* System interface/VSYNC interface */
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_EXT_DISP_IF_CONTROL, 0x0003);
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/* Front porch lines: 8; Back porch lines: 8; */
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lcd_write_reg(R_DISP_CONTROL2, 0x0808);
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/* Scan mode by the gate driver in the non-display area: disabled;
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2006-03-17 15:42:06 +00:00
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* Cycle of scan by the gate driver - set to 31frames(518ms),
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* disabled by above setting */
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2005-12-20 23:15:27 +00:00
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lcd_write_reg(R_DISP_CONTROL3, 0x003f);
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0003);
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0707);
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0007);
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lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x0705);
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0007);
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 0x0000);
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0407);
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lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0507);
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lcd_write_reg(R_GAMMA_AMP_ADJ_RES_POS, 0x1d09);
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lcd_write_reg(R_GAMMA_AMP_AVG_ADJ_RES_NEG, 0x0303);
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2006-03-17 15:42:06 +00:00
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display_on=true; /* must be done before calling lcd_update() */
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lcd_update();
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sleep(4); /* op-amp stabilising time */
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2005-12-20 23:15:27 +00:00
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2006-03-17 15:42:06 +00:00
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/** Sequence according to datasheet, p. 130 **/
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lcd_write_reg(R_POWER_CONTROL1, 0x4540); /* SAP2-0=100, BT2-0=101, AP2-0=100 */
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lcd_write_reg(R_DISP_CONTROL1, 0x0005); /* GON=0, DTE=0, REV=1, D1-0=01 */
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sleep(2);
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lcd_write_reg(R_DISP_CONTROL1, 0x0025); /* GON=1, DTE=0, REV=1, D1-0=01 */
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lcd_write_reg(R_DISP_CONTROL1, 0x0027); /* GON=1, DTE=0, REV=1, D1-0=11 */
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sleep(2);
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lcd_write_reg(R_DISP_CONTROL1, 0x0037); /* GON=1, DTE=1, REV=1, D1-0=11 */
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}
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/* LCD init */
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void lcd_init_device(void)
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{
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/* GPO46 is LCD RESET */
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or_l(0x00004000, &GPIO1_OUT);
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or_l(0x00004000, &GPIO1_ENABLE);
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or_l(0x00004000, &GPIO1_FUNCTION);
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/* Reset LCD */
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and_l(~0x00004000, &GPIO1_OUT);
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sleep(1);
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or_l(0x00004000, &GPIO1_OUT);
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2005-11-14 20:41:49 +00:00
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sleep(1);
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2005-12-20 23:15:27 +00:00
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2009-10-11 13:30:06 +00:00
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DAR3 = 0xf0000002; /* Configure DMA channel 3 */
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DSR3 = 1;
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DIVR3 = 57; /* DMA3 is mapped into vector 57 in system.c */
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ICR9 = (6 << 2); /* Enable DMA3 interrupt at level 6, priority 0 */
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2011-06-17 03:09:47 +00:00
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coldfire_imr_mod(0, 1 << 17);
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2009-10-11 13:30:06 +00:00
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mutex_init(&lcd_mtx);
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2006-03-17 15:42:06 +00:00
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_display_on();
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2005-12-20 23:15:27 +00:00
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}
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void lcd_enable(bool on)
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{
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2009-10-11 13:30:06 +00:00
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if (display_on != on)
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2006-03-17 15:42:06 +00:00
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{
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2009-10-11 13:30:06 +00:00
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mutex_lock(&lcd_mtx);
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if (on)
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2005-12-20 23:15:27 +00:00
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{
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2006-03-17 15:42:06 +00:00
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_display_on();
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2009-10-20 21:54:59 +00:00
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send_event(LCD_EVENT_ACTIVATION, NULL);
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2005-12-20 23:15:27 +00:00
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}
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else
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{
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2006-03-17 15:42:06 +00:00
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/** Off sequence according to datasheet, p. 130 **/
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lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x0002); /* EQ=0, 18 clks/line */
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lcd_write_reg(R_DISP_CONTROL1, 0x0036); /* GON=1, DTE=1, REV=1, D1-0=10 */
|
|
|
|
sleep(2);
|
|
|
|
|
|
|
|
lcd_write_reg(R_DISP_CONTROL1, 0x0026); /* GON=1, DTE=0, REV=1, D1-0=10 */
|
|
|
|
sleep(2);
|
|
|
|
|
|
|
|
lcd_write_reg(R_DISP_CONTROL1, 0x0000); /* GON=0, DTE=0, D1-0=00 */
|
2005-12-20 23:15:27 +00:00
|
|
|
|
2006-03-17 15:42:06 +00:00
|
|
|
lcd_write_reg(R_POWER_CONTROL1, 0x0000); /* SAP2-0=000, AP2-0=000 */
|
|
|
|
lcd_write_reg(R_POWER_CONTROL3, 0x0000); /* PON=0 */
|
|
|
|
lcd_write_reg(R_POWER_CONTROL4, 0x0000); /* VCOMG=0 */
|
|
|
|
|
|
|
|
/* datasheet p. 131 */
|
|
|
|
lcd_write_reg(R_POWER_CONTROL1, 0x0001); /* STB=1: standby mode */
|
2005-12-20 23:15:27 +00:00
|
|
|
|
2006-01-09 16:11:19 +00:00
|
|
|
display_on=false;
|
2005-12-20 23:15:27 +00:00
|
|
|
}
|
2009-10-11 13:30:06 +00:00
|
|
|
mutex_unlock(&lcd_mtx);
|
2005-12-20 23:15:27 +00:00
|
|
|
}
|
2005-11-14 20:41:49 +00:00
|
|
|
}
|
|
|
|
|
2009-03-17 02:43:47 +00:00
|
|
|
bool lcd_active(void)
|
2007-07-31 12:43:06 +00:00
|
|
|
{
|
|
|
|
return display_on;
|
|
|
|
}
|
|
|
|
|
2005-11-14 20:41:49 +00:00
|
|
|
/*** update functions ***/
|
|
|
|
|
2006-08-23 17:30:51 +00:00
|
|
|
/* Line write helper function for lcd_yuv_blit. Write two lines of yuv420.
|
2007-10-14 23:05:56 +00:00
|
|
|
* y should have two lines of Y back to back, 2nd line first.
|
|
|
|
* c should contain the Cb and Cr data for the two lines of Y back to back.
|
2006-11-04 00:42:18 +00:00
|
|
|
* Needs EMAC set to saturated, signed integer mode.
|
2006-08-23 17:30:51 +00:00
|
|
|
*/
|
|
|
|
extern void lcd_write_yuv420_lines(const unsigned char *y,
|
2007-10-14 23:05:56 +00:00
|
|
|
const unsigned char *c, int cwidth);
|
2006-08-23 17:30:51 +00:00
|
|
|
|
|
|
|
/* Performance function to blit a YUV bitmap directly to the LCD
|
|
|
|
* src_x, src_y, width and height should be even
|
|
|
|
* x, y, width and height have to be within LCD bounds
|
|
|
|
*/
|
2008-03-24 00:35:53 +00:00
|
|
|
void lcd_blit_yuv(unsigned char * const src[3],
|
2006-08-08 13:44:43 +00:00
|
|
|
int src_x, int src_y, int stride,
|
|
|
|
int x, int y, int width, int height)
|
|
|
|
{
|
2006-11-04 00:42:18 +00:00
|
|
|
/* IRAM Y, Cb and Cb buffers. */
|
2006-08-23 17:30:51 +00:00
|
|
|
unsigned char y_ibuf[LCD_WIDTH*2];
|
2007-10-14 23:05:56 +00:00
|
|
|
unsigned char c_ibuf[LCD_WIDTH];
|
2006-08-23 17:30:51 +00:00
|
|
|
const unsigned char *ysrc, *usrc, *vsrc;
|
|
|
|
const unsigned char *ysrc_max;
|
2006-08-08 13:44:43 +00:00
|
|
|
|
2006-08-23 17:30:51 +00:00
|
|
|
if (!display_on)
|
|
|
|
return;
|
|
|
|
|
2009-10-11 13:30:06 +00:00
|
|
|
mutex_lock(&lcd_mtx);
|
2006-08-23 17:30:51 +00:00
|
|
|
width &= ~1; /* stay on the safe side */
|
|
|
|
height &= ~1;
|
|
|
|
|
2007-10-14 23:05:56 +00:00
|
|
|
lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_HORZ);
|
2006-08-23 17:30:51 +00:00
|
|
|
/* Set start position and window */
|
2007-10-14 23:05:56 +00:00
|
|
|
lcd_write_reg(R_VERT_RAM_ADDR_POS, ((xoffset + 219) << 8) | xoffset);
|
2006-08-23 17:30:51 +00:00
|
|
|
|
|
|
|
ysrc = src[0] + src_y * stride + src_x;
|
|
|
|
usrc = src[1] + (src_y * stride >> 2) + (src_x >> 1);
|
|
|
|
vsrc = src[2] + (src_y * stride >> 2) + (src_x >> 1);
|
|
|
|
ysrc_max = ysrc + height * stride;
|
|
|
|
|
2006-11-04 00:42:18 +00:00
|
|
|
coldfire_set_macsr(EMAC_SATURATE);
|
2006-08-23 17:30:51 +00:00
|
|
|
do
|
|
|
|
{
|
2007-10-14 23:05:56 +00:00
|
|
|
lcd_write_reg(R_HORIZ_RAM_ADDR_POS, ((y + 1) << 8) | y);
|
|
|
|
lcd_write_reg(R_RAM_ADDR_SET, ((x+xoffset) << 8) | y);
|
|
|
|
lcd_begin_write_gram();
|
|
|
|
|
|
|
|
memcpy(y_ibuf + width, ysrc, width);
|
|
|
|
memcpy(y_ibuf, ysrc + stride, width);
|
|
|
|
memcpy(c_ibuf, usrc, width >> 1);
|
|
|
|
memcpy(c_ibuf + (width >> 1), vsrc, width >> 1);
|
|
|
|
lcd_write_yuv420_lines(y_ibuf, c_ibuf, width >> 1);
|
|
|
|
|
|
|
|
y += 2;
|
2006-08-23 17:30:51 +00:00
|
|
|
ysrc += 2 * stride;
|
|
|
|
usrc += stride >> 1;
|
|
|
|
vsrc += stride >> 1;
|
2006-08-08 13:44:43 +00:00
|
|
|
}
|
2006-08-23 17:30:51 +00:00
|
|
|
while (ysrc < ysrc_max);
|
2009-10-11 13:30:06 +00:00
|
|
|
mutex_unlock(&lcd_mtx);
|
2006-08-08 13:44:43 +00:00
|
|
|
}
|
2005-11-14 20:41:49 +00:00
|
|
|
|
2009-10-11 13:30:06 +00:00
|
|
|
/* LCD DMA ISR */
|
|
|
|
void DMA3(void) __attribute__ ((interrupt_handler, section(".icode")));
|
|
|
|
void DMA3(void)
|
|
|
|
{
|
|
|
|
DSR3 = 1;
|
|
|
|
if (--dma_count > 0)
|
|
|
|
{
|
|
|
|
dma_addr += LCD_WIDTH*sizeof(fb_data);
|
|
|
|
SAR3 = dma_addr;
|
|
|
|
BCR3 = dma_len;
|
|
|
|
DCR3 = DMA_INT | DMA_AA | DMA_BWC(1)
|
|
|
|
| DMA_SINC | DMA_SSIZE(DMA_SIZE_LINE)
|
|
|
|
| DMA_DSIZE(DMA_SIZE_WORD) | DMA_START;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-11-14 20:41:49 +00:00
|
|
|
/* Update the display.
|
|
|
|
This must be called after all other LCD functions that change the display. */
|
|
|
|
void lcd_update(void)
|
|
|
|
{
|
2009-10-11 13:30:06 +00:00
|
|
|
if (display_on)
|
|
|
|
{
|
|
|
|
mutex_lock(&lcd_mtx);
|
|
|
|
|
2007-10-14 23:05:56 +00:00
|
|
|
lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_VERT);
|
|
|
|
/* set start position window */
|
|
|
|
lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 175 << 8);
|
2006-03-17 15:42:06 +00:00
|
|
|
lcd_write_reg(R_VERT_RAM_ADDR_POS,((xoffset+219)<<8) | xoffset);
|
|
|
|
lcd_write_reg(R_RAM_ADDR_SET, xoffset << 8);
|
2007-10-14 23:05:56 +00:00
|
|
|
|
2005-12-20 23:15:27 +00:00
|
|
|
lcd_begin_write_gram();
|
2006-11-02 20:50:50 +00:00
|
|
|
|
2009-10-11 13:30:06 +00:00
|
|
|
dma_count = 1;
|
2006-11-02 20:50:50 +00:00
|
|
|
SAR3 = (unsigned long)lcd_framebuffer;
|
2009-10-11 13:30:06 +00:00
|
|
|
BCR3 = LCD_WIDTH*LCD_HEIGHT*sizeof(fb_data);
|
|
|
|
DCR3 = DMA_INT | DMA_AA | DMA_BWC(1)
|
2006-11-02 20:50:50 +00:00
|
|
|
| DMA_SINC | DMA_SSIZE(DMA_SIZE_LINE)
|
|
|
|
| DMA_DSIZE(DMA_SIZE_WORD) | DMA_START;
|
|
|
|
|
2009-10-11 13:30:06 +00:00
|
|
|
while (dma_count > 0)
|
|
|
|
yield();
|
|
|
|
|
|
|
|
mutex_unlock(&lcd_mtx);
|
2005-12-20 23:15:27 +00:00
|
|
|
}
|
2005-11-14 20:41:49 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Update a fraction of the display. */
|
|
|
|
void lcd_update_rect(int x, int y, int width, int height)
|
|
|
|
{
|
2009-10-11 13:30:06 +00:00
|
|
|
if (display_on)
|
|
|
|
{
|
|
|
|
if (x + width > LCD_WIDTH)
|
2005-12-20 23:15:27 +00:00
|
|
|
width = LCD_WIDTH - x;
|
2009-10-11 13:30:06 +00:00
|
|
|
if (y + height > LCD_HEIGHT)
|
2006-11-02 20:50:50 +00:00
|
|
|
height = LCD_HEIGHT - y;
|
2005-12-20 23:15:27 +00:00
|
|
|
|
2009-10-11 13:30:06 +00:00
|
|
|
if (width <= 0 || height <= 0) /* nothing to do */
|
|
|
|
return;
|
|
|
|
|
|
|
|
mutex_lock(&lcd_mtx);
|
|
|
|
|
2007-10-14 23:05:56 +00:00
|
|
|
lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_VERT);
|
2006-11-02 20:50:50 +00:00
|
|
|
/* set update window */
|
2007-10-14 23:05:56 +00:00
|
|
|
lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 175 << 8);
|
2006-03-17 15:42:06 +00:00
|
|
|
lcd_write_reg(R_VERT_RAM_ADDR_POS,((x+xoffset+width-1) << 8) | (x+xoffset));
|
|
|
|
lcd_write_reg(R_RAM_ADDR_SET, ((x+xoffset) << 8) | y);
|
2009-10-11 13:30:06 +00:00
|
|
|
|
2006-11-02 20:50:50 +00:00
|
|
|
lcd_begin_write_gram();
|
|
|
|
|
2009-10-11 13:30:06 +00:00
|
|
|
if (width == LCD_WIDTH)
|
|
|
|
{
|
|
|
|
dma_count = 1;
|
|
|
|
SAR3 = (unsigned long)lcd_framebuffer[y];
|
|
|
|
BCR3 = (LCD_WIDTH*sizeof(fb_data)) * height;
|
|
|
|
}
|
|
|
|
else
|
2006-11-02 20:50:50 +00:00
|
|
|
{
|
2009-10-11 13:30:06 +00:00
|
|
|
dma_count = height;
|
|
|
|
SAR3 = dma_addr = (unsigned long)&lcd_framebuffer[y][x];
|
|
|
|
BCR3 = dma_len = width * sizeof(fb_data);
|
|
|
|
}
|
|
|
|
DCR3 = DMA_INT | DMA_AA | DMA_BWC(1)
|
|
|
|
| DMA_SINC | DMA_SSIZE(DMA_SIZE_LINE)
|
|
|
|
| DMA_DSIZE(DMA_SIZE_WORD) | DMA_START;
|
2006-11-02 20:50:50 +00:00
|
|
|
|
2009-10-11 13:30:06 +00:00
|
|
|
while (dma_count > 0)
|
|
|
|
yield();
|
2006-11-02 20:50:50 +00:00
|
|
|
|
2009-10-11 13:30:06 +00:00
|
|
|
mutex_unlock(&lcd_mtx);
|
2005-12-20 23:15:27 +00:00
|
|
|
}
|
2005-11-14 20:41:49 +00:00
|
|
|
}
|