2008-03-13 03:48:23 +00:00
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#include "config.h"
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2011-02-06 20:10:45 +00:00
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ENTRY(_start)
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2008-03-13 03:48:23 +00:00
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OUTPUT_FORMAT(elf32-littlearm)
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OUTPUT_ARCH(arm)
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2008-04-29 06:19:32 +00:00
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STARTUP(target/arm/tms320dm320/crt0.o)
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2008-03-13 03:48:23 +00:00
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2009-04-09 04:45:19 +00:00
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#ifndef LCD_NATIVE_WIDTH
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#define LCD_NATIVE_WIDTH LCD_WIDTH
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#endif
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#ifndef LCD_NATIVE_HEIGHT
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#define LCD_NATIVE_HEIGHT LCD_HEIGHT
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#endif
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2009-04-09 04:22:14 +00:00
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#define LCD_FUDGE LCD_NATIVE_WIDTH%32
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2009-04-01 03:21:18 +00:00
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2011-02-06 20:10:45 +00:00
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#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
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2008-03-13 03:48:23 +00:00
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2009-04-09 04:22:14 +00:00
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/* must be 16Kb (0x4000) aligned */
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#define TTB_SIZE 0x4000
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2008-03-13 03:48:23 +00:00
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2009-04-21 04:29:10 +00:00
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/* Give this some memory to allow it to align to the MMU boundary.
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* Note that since there are two buffers (YUV/RGB) it calculates the approximate
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* memory needed in steps of 1 Meg.
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*/
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#define LCD_TTB_AREA 0x100000*((LCD_BUFFER_SIZE>>19)+1)
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2008-03-13 03:48:23 +00:00
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2010-09-20 17:09:55 +00:00
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#define DRAMSIZE (MEMORYSIZE * 0x100000)
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2008-03-13 03:48:23 +00:00
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2011-11-16 14:08:01 +00:00
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#define DRAMORIG CONFIG_SDRAM_START
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2011-02-06 20:10:45 +00:00
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#define FLASHORIG 0x00100000
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#define FLASHSIZE 0x00800000
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#define ITCMORIG 0x00000000
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#define ITCMSIZE 0x4000
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#define DTCMORIG 0x00020000
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#define DTCMSIZE 0x4000
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PRO_STACK_SIZE = 0x2000;
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IRQ_STACK_SIZE = 0x600;
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FIQ_STACK_SIZE = 0x400;
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2009-04-01 03:21:18 +00:00
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2009-04-09 04:22:14 +00:00
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/* End of the audio buffer, where the codec buffer starts */
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2011-02-06 20:10:45 +00:00
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#define ENDAUDIOADDR \
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(DRAMORIG + DRAMSIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA)
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2009-04-01 03:21:18 +00:00
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2008-03-13 03:48:23 +00:00
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MEMORY
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{
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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2011-02-06 20:10:45 +00:00
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ITCM : ORIGIN = ITCMORIG, LENGTH = ITCMSIZE
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DTCM : ORIGIN = DTCMORIG, LENGTH = DTCMSIZE
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2008-03-13 03:48:23 +00:00
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}
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SECTIONS
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{
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2011-02-06 20:10:45 +00:00
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/* Set up variables needed for memory initialization */
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_sdram_start = DRAMORIG;
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_sdram_sizem = ((_endsdram - _sdram_start) / 0x100000);
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_flash_start = FLASHORIG;
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_flash_sizem = (FLASHSIZE / 0x100000);
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/* crt0.S initialization */
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.init :
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2008-03-13 03:48:23 +00:00
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{
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2011-02-06 20:10:45 +00:00
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. = ALIGN(0x4);
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2008-03-13 03:48:23 +00:00
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loadaddress = .;
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2011-12-09 20:45:14 +00:00
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_loadaddress = .;
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2011-02-06 20:10:45 +00:00
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*(.init)
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} > DRAM
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.vectors ITCMORIG :
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{
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2008-03-13 03:48:23 +00:00
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. = ALIGN(0x4);
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2011-02-06 20:10:45 +00:00
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_vectorsstart = .;
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2011-12-18 06:43:08 +00:00
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KEEP(*(.vectors));
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2011-02-06 20:10:45 +00:00
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_vectorsend = .;
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} > ITCM AT> DRAM
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_vectorscopy = LOADADDR(.vectors);
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.text :
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{
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. = ALIGN(0x4);
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*(.text*)
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} > DRAM
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/* Thumb interworking sections - for some reason LD dies even if these
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* sections are empty.
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*/
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.glue :
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{
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. = ALIGN(0x4);
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*(.glue_7) /* ARM calling Thumb */
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*(.glue_7t) /* Thumb calling ARM */
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2008-03-13 03:48:23 +00:00
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} > DRAM
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.rodata :
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{
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. = ALIGN(0x4);
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2011-02-06 20:10:45 +00:00
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*(.rodata*)
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2008-03-13 03:48:23 +00:00
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} > DRAM
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2009-04-01 03:21:18 +00:00
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.data :
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2008-03-13 03:48:23 +00:00
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{
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. = ALIGN(0x4);
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2011-02-06 20:10:45 +00:00
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*(.data*)
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2009-04-01 03:21:18 +00:00
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} > DRAM
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2008-03-13 03:48:23 +00:00
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.iram :
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{
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2011-02-06 20:10:45 +00:00
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. = ALIGN(0x4);
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2008-03-13 03:48:23 +00:00
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_iramstart = .;
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2011-12-17 01:43:32 +00:00
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*(.icode*)
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*(.irodata*)
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*(.idata*)
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2008-03-13 03:48:23 +00:00
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_iramend = .;
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2011-02-06 20:10:45 +00:00
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} > ITCM AT> DRAM
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2008-03-13 03:48:23 +00:00
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_iramcopy = LOADADDR(.iram);
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2011-02-06 20:10:45 +00:00
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2011-02-07 04:55:31 +00:00
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.bss (NOLOAD) :
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{
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. = ALIGN(0x4);
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_bss_start = .;
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*(.bss*)
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*(COMMON)
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_bss_end = .;
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2011-12-09 20:45:14 +00:00
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_end = .;
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2011-02-07 04:55:31 +00:00
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} > DRAM
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.ibss (NOLOAD) :
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2008-03-13 03:48:23 +00:00
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{
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. = ALIGN(0x4);
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2011-02-06 20:10:45 +00:00
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_ibss_start = .;
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2011-12-17 01:43:32 +00:00
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*(.ibss*)
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2011-02-06 20:10:45 +00:00
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_ibss_end = .;
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2011-02-07 04:55:31 +00:00
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} > ITCM
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2008-03-13 03:48:23 +00:00
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2011-02-06 20:10:45 +00:00
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/* Program stack space */
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.pro_stack (NOLOAD):
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2008-03-13 03:48:23 +00:00
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{
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2011-02-06 20:10:45 +00:00
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. = ALIGN(0x4);
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*(.stack)
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stackbegin = .; /* Variable for thread.c */
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_pro_stack_end = .;
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. += PRO_STACK_SIZE;
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_pro_stack_start = .;
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stackend = .; /* Variable for tread.c */
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2011-02-07 04:55:31 +00:00
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} > ITCM
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2009-08-12 02:34:07 +00:00
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2011-02-06 20:10:45 +00:00
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/* IRQ stack space */
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.irq_stack (NOLOAD):
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2009-08-12 02:34:07 +00:00
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{
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2011-02-06 20:10:45 +00:00
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. = ALIGN(0x4);
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_irq_stack_end = .;
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. += IRQ_STACK_SIZE;
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_irq_stack_start = .;
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2011-02-07 04:55:31 +00:00
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} > ITCM
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2011-02-06 20:10:45 +00:00
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/* FIQ stack space */
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.fiq_stack (NOLOAD):
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2009-04-01 03:54:48 +00:00
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{
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. = ALIGN(0x4);
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2011-02-06 20:10:45 +00:00
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_fiq_stack_end = .;
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. += FIQ_STACK_SIZE;
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_fiq_stack_start = .;
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2011-02-07 04:55:31 +00:00
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} > ITCM
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2008-03-13 03:48:23 +00:00
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2009-04-01 03:21:18 +00:00
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.audiobuf (NOLOAD) :
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2008-03-13 03:48:23 +00:00
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{
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2009-04-01 03:21:18 +00:00
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. = ALIGN(4);
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2008-03-13 03:48:23 +00:00
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audiobuffer = .;
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} > DRAM
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2009-04-01 03:21:18 +00:00
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.audiobufend ENDAUDIOADDR (NOLOAD) :
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2008-03-13 03:48:23 +00:00
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{
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audiobufend = .;
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} > DRAM
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2009-04-01 03:21:18 +00:00
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.codec ENDAUDIOADDR (NOLOAD) :
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2008-03-13 03:48:23 +00:00
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{
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codecbuf = .;
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2009-04-09 04:22:14 +00:00
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. += CODEC_SIZE;
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} > DRAM
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2008-03-13 03:48:23 +00:00
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2009-04-09 04:22:14 +00:00
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.plugin (NOLOAD) :
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2008-03-13 03:48:23 +00:00
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{
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pluginbuf = .;
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2009-04-09 04:22:14 +00:00
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. += PLUGIN_BUFFER_SIZE;
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} > DRAM
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2009-04-01 03:21:18 +00:00
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2011-02-06 20:10:45 +00:00
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_endsdram = .;
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2009-04-09 04:22:14 +00:00
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.ttbtable (NOLOAD) :
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2009-04-01 03:21:18 +00:00
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{
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2009-04-09 04:22:14 +00:00
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. = ALIGN (0x4000);
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_ttbstart = .;
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. += TTB_SIZE;
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} > DRAM
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/* The LCD buffer should be at the end of memory to protect against
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* overflowing something else when the YUV blitter is fudging the screen
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* size.
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*/
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2009-04-01 03:21:18 +00:00
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2009-04-09 04:22:14 +00:00
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.lcdbuffer (NOLOAD) :
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2009-04-01 03:21:18 +00:00
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{
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2009-04-09 04:22:14 +00:00
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_lcdbuf = .;
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. += LCD_BUFFER_SIZE;
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} > DRAM
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2009-04-21 04:29:10 +00:00
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.lcdbuffer2 (NOLOAD) :
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{
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_lcdbuf2 = .;
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. += LCD_BUFFER_SIZE;
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} > DRAM
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2008-03-13 03:48:23 +00:00
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}
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