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Do some things to make -ffunction-sections work better.

Browse source 
* Add wildcards to various sections placements a la *(".text") => "*(.text*)"
* Remove hacky bits from those linker scripts (no problem encountered testing)
* Change section for asm functions from .<section> to .<section>.<function>
  so that -ffunction-sections works for those asm file too.


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31337 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2011-12-17 01:43:32 +00:00
parent 8f92ab02e1
commit 28dec004c0
17 changed files with 79 additions and 104 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
firmware/target/arm/bits-armv4.S
View file

@ -22,7 +22,7 @@
/***************************************************************************
* void bitmod32(volatile uint32_t *addr, uint32_t bits, uint32_t mask)
*/
.section .text, "ax", %progbits
.section .text.bitmod32, "ax", %progbits
.align 2
.global bitmod32
.type bitmod32, %function
@ -42,7 +42,7 @@ bitmod32:
/***************************************************************************
* void bitset32(volatile uint32_t *addr, uint32_t mask)
*/
.section .text, "ax", %progbits
.section .text.bitset32, "ax", %progbits
.align 2
.global bitset32
.type bitset32, %function
@ -61,7 +61,7 @@ bitset32:
/***************************************************************************
* void bitclr32(volatile uint32_t *addr, uint32_t mask)
*/
.section .text, "ax", %progbits
.section .text.bitclr32, "ax", %progbits
.align 2
.global bitclr32
.type bitclr32, %function
@ -79,7 +79,7 @@ bitclr32:
/***************************************************************************
* void bitmod16(volatile uint16_t *addr, uint16_t bits, uint16_t mask)
*/
.section .text, "ax", %progbits
.section .text.bitmod16, "ax", %progbits
.align 2
.global bitmod16
.type bitmod16, %function
@ -99,7 +99,7 @@ bitmod16:
/***************************************************************************
* void bitset16(volatile uint16_t *addr, uint16_t mask)
*/
.section .text, "ax", %progbits
.section .text.bitset16, "ax", %progbits
.align 2
.global bitset16
.type bitset16, %function
@ -118,7 +118,7 @@ bitset16:
/***************************************************************************
* void bitclr16(volatile uint16_t *addr, uint16_t mask)
*/
.section .text, "ax", %progbits
.section .text.bitclr16, "ax", %progbits
.align 2
.global bitclr16
.type bitclr16, %function

6
firmware/target/arm/bits-armv6.S
View file

@ -22,7 +22,7 @@
/***************************************************************************
* void bitmod32(volatile uint32_t *addr, uint32_t bits, uint32_t mask)
*/
.section .text, "ax", %progbits
.section .text.bitmod32, "ax", %progbits
.align 2
.global bitmod32
.type bitmod32, %function
@ -41,7 +41,7 @@ bitmod32:
/***************************************************************************
* void bitset32(volatile uint32_t *addr, uint32_t mask)
*/
.section .text, "ax", %progbits
.section .text.bitset32, "ax", %progbits
.align 2
.global bitset32
.type bitset32, %function
@ -59,7 +59,7 @@ bitset32:
/***************************************************************************
* void bitclr32(volatile uint32_t *addr, uint32_t mask)
*/
.section .text, "ax", %progbits
.section .text.bitclr32, "ax", %progbits
.align 2
.global bitclr32
.type bitclr32, %function

11
firmware/target/arm/boot-pp502x-bl-usb.lds
View file

@ -39,10 +39,7 @@ SECTIONS
.rodata :
{
*(.rodata) /* problems without this, dunno why */
*(.rodata*)
*(.rodata.str1.1)
*(.rodata.str1.4)
. = ALIGN(0x4);
} > DRAM
@ -73,7 +70,7 @@ SECTIONS
{
_iedata = .;
*(.qharray)
*(.ibss)
*(.ibss*)
. = ALIGN(0x4);
_iend = .;
} > IRAM
@ -81,9 +78,9 @@ SECTIONS
.iram _iend :
{
_iramstart = .;
*(.icode)
*(.irodata)
*(.idata)
*(.icode*)
*(.irodata*)
*(.idata*)
_iramend = .;
} > IRAM AT> DRAM

8
firmware/target/arm/imx233/app.lds
View file

@ -52,9 +52,9 @@ SECTIONS
_iramstart = .; // always 0
*(.vectors)
KEEP(*(.vectors));// otherwise there are no references to it and the linker strip it
*(.icode)
*(.irodata)
*(.idata)
*(.icode*)
*(.irodata*)
*(.idata*)
. = ALIGN(0x4);
_iramend = .;
} > IRAM AT> DRAM
@ -65,7 +65,7 @@ SECTIONS
{
_iedata = .;
*(.qharray)
*(.ibss)
*(.ibss*)
. = ALIGN(0x4);
_iend = .;
} > IRAM

8
firmware/target/arm/imx233/boot.lds
View file

@ -44,9 +44,9 @@ SECTIONS
_iramstart = .; // always 0
*(.vectors)
KEEP(*(.vectors));// otherwise there are no references to it and the linker strip it
*(.icode)
*(.irodata)
*(.idata)
*(.icode*)
*(.irodata*)
*(.idata*)
. = ALIGN(0x4);
_iramend = .;
} > IRAM AT> DRAM
@ -62,7 +62,7 @@ SECTIONS
{
_iedata = .;
*(.qharray)
*(.ibss)
*(.ibss*)
. = ALIGN(0x4);
_iend = .;
} > IRAM

15
firmware/target/arm/imx31/app.lds
View file

@ -46,7 +46,7 @@ SECTIONS
. = ALIGN(0x200);
*(.init.text)
*(.text*)
*(.icode)
*(.icode*)
*(.glue_7)
*(.glue_7t)
. = ALIGN(0x4);
@ -54,18 +54,15 @@ SECTIONS
.rodata :
{
*(.rodata) /* problems without this, dunno why */
*(.rodata*)
*(.rodata.str1.1)
*(.rodata.str1.4)
*(.irodata)
*(.irodata*)
. = ALIGN(0x4);
} > DRAM
.data :
{
*(.data*)
*(.idata)
*(.idata*)
. = ALIGN(0x4);
} > DRAM
@ -102,8 +99,8 @@ SECTIONS
{
. = ALIGN(4);
_initstart = .;
*(.init)
*(.initdata)
*(.init*)
*(.initdata*)
_initend = .;
} > INIT AT> DRAM
@ -122,7 +119,7 @@ SECTIONS
{
_edata = .;
*(.bss*)
*(.ibss)
*(.ibss*)
*(COMMON)
. = ALIGN(0x4);
} > DRAM

12
firmware/target/arm/imx31/boot.lds
View file

@ -30,7 +30,7 @@ SECTIONS
{
*(.init.text)
*(.text*)
*(.icode)
*(.icode*)
*(.glue_7)
*(.glue_7t)
. = ALIGN(0x4);
@ -38,21 +38,17 @@ SECTIONS
.rodata :
{
*(.rodata) /* problems without this, dunno why */
*(.rodata*)
*(.rodata.str1.1)
*(.rodata.str1.4)
*(.irodata*)
. = ALIGN(0x4);
/* Pseudo-allocate the copies of the data sections */
_datacopy = .;
} > DRAM
.data :
{
*(.irodata)
*(.idata)
*(.data*)
*(.idata*)
_dataend = . ;
} > DRAM
@ -93,7 +89,7 @@ SECTIONS
{
_edata = .;
*(.bss*);
*(.ibss);
*(.ibss*);
*(COMMON)
. = ALIGN(0x4);
} > DRAM

12
firmware/target/arm/lcd-as-memframe.S
View file

@ -28,7 +28,7 @@
* void lcd_copy_buffer_rect(fb_data *dst, fb_data *src, int width,
* int height);
*/
.section .icode, "ax", %progbits
.section .icode.lcd_copy_buffer_rect, "ax", %progbits
.align 2
.global lcd_copy_buffer_rect
.type lcd_copy_buffer_rect, %function
@ -55,7 +55,7 @@ lcd_copy_buffer_rect: @
@ align (rw)
and r14, r14, #0xe @ r14 = 0 (16), 2, 4, 6, 8, 10, 12, 14
add pc, pc, r14, lsl #3 @ branch to 32-byte align
nop @
nop @
b 30f @ rw % 16 = 0 or 1? use octword loop
nop @
nop @
@ -93,7 +93,7 @@ lcd_copy_buffer_rect: @
ldmia r1!, { r6-r12, r14 } @
subs r2, r2, #16 @
stmia r0!, { r6-r12, r14 } @
bgt 30b @ octword loop @
bgt 30b @ octword loop @
40: @ finish line @
ldreqh r6, [r1], #2 @ finish last halfword if eq ...
add r1, r1, r4, lsl #1 @
@ -123,7 +123,7 @@ lcd_copy_buffer_rect: @
* 1 3 + > down
* 2 4 \/ left
*/
.section .icode, "ax", %progbits
.section .icode.lcd_write_yuv420_lines, "ax", %progbits
.align 2
.global lcd_write_yuv420_lines
.type lcd_write_yuv420_lines, %function
@ -376,7 +376,7 @@ lcd_write_yuv420_lines:
* 4 2 5 3 | 3 7 2 6 | 3 5 7 1 2 4 6 0 col2 \/
* 0 6 1 7 5 1 4 0
*/
.section .icode, "ax", %progbits
.section .icode.lcd_write_yuv420_lines_odither, "ax", %progbits
.align 2
.global lcd_write_yuv420_lines_odither
.type lcd_write_yuv420_lines_odither, %function
@ -410,7 +410,7 @@ lcd_write_yuv420_lines_odither:
add r12, r7, r7, asl #2 @
add r12, r12, r12, asl #4 @
add r7, r12, r7, asl #6 @
@
@
sub r8, r8, #128 @ Cb -= 128
sub r9, r9, #128 @ Cr -= 128
@

18
firmware/target/arm/mmu-arm.S
View file

@ -85,7 +85,7 @@
/*
* void ttb_init(void);
*/
.section .text, "ax", %progbits
.section .text.ttb_init, "ax", %progbits
.align 2
.global ttb_init
.type ttb_init, %function
@ -100,7 +100,7 @@ ttb_init:
/*
* void map_section(unsigned int pa, unsigned int va, int mb, int flags);
*/
.section .text, "ax", %progbits
.section .text.map_section, "ax", %progbits
.align 2
.global map_section
.type map_section, %function
@ -148,7 +148,7 @@ map_section:
/*
* void enable_mmu(void);
*/
.section .text, "ax", %progbits
.section .text.enable_mmu, "ax", %progbits
.align 2
.global enable_mmu
.type enable_mmu, %function
@ -180,7 +180,7 @@ enable_mmu:
* from DCache afterwards
* void commit_discard_dcache_range(const void *base, unsigned int size);
*/
.section .text, "ax", %progbits
.section .text.commit_discard_dcache_range, "ax", %progbits
.align 2
.global commit_discard_dcache_range
.type commit_discard_dcache_range, %function
@ -228,7 +228,7 @@ invalidate_dcache_range:
* Write DCache back to RAM for the given range
* void commit_dcache_range(const void *base, unsigned int size);
*/
.section .text, "ax", %progbits
.section .text.commit_dcache_range, "ax", %progbits
.align 2
.global commit_dcache_range
.type commit_dcache_range, %function
@ -277,7 +277,7 @@ clean_dcache_range:
* will *NOT* do write back except for buffer edges not on a line boundary
* void discard_dcache_range(const void *base, unsigned int size);
*/
.section .text, "ax", %progbits
.section .text.discard_dcache_range, "ax", %progbits
.align 2
.global discard_dcache_range
.type discard_dcache_range, %function
@ -335,7 +335,7 @@ dump_dcache_range:
* Write entire DCache back to RAM
* void commit_dcache(void);
*/
.section .text, "ax", %progbits
.section .text.commit_dcache, "ax", %progbits
.align 2
.global commit_dcache
.type commit_dcache, %function
@ -372,7 +372,7 @@ cpucache_flush:
* Commit and discard entire DCache, will do writeback
* void commit_discard_dcache(void);
*/
.section .icode, "ax", %progbits
.section .icode.commit_discard_dcache, "ax", %progbits
.align 2
.global commit_discard_dcache
.type commit_discard_dcache, %function
@ -405,7 +405,7 @@ invalidate_dcache:
* Discards the entire ICache, and commit+discards the entire DCache
* void commit_discard_idcache(void);
*/
.section .icode, "ax", %progbits
.section .icode.commit_discard_idcache, "ax", %progbits
.align 2
.global commit_discard_idcache
.type commit_discard_idcache, %function

16
firmware/target/arm/mmu-armv6.S
View file

@ -32,7 +32,7 @@
* from DCache afterwards
* void commit_discard_dcache_range(const void *base, unsigned int size);
*/
.section .text, "ax", %progbits
.section .text.commit_discard_dcache_range, "ax", %progbits
.align 2
.global commit_discard_dcache_range
.type commit_discard_dcache_range, %function
@ -56,7 +56,7 @@ invalidate_dcache_range:
* Write DCache back to RAM for the given range
* void commit_dcache_range(const void *base, unsigned int size);
*/
.section .text, "ax", %progbits
.section .text.commit_dcache_range, "ax", %progbits
.align 2
.global commit_dcache_range
.type commit_dcache_range, %function
@ -79,7 +79,7 @@ clean_dcache_range:
* will *NOT* do write back except for buffer edges not on a line boundary
* void discard_dcache_range(const void *base, unsigned int size);
*/
.section .text, "ax", %progbits
.section .text.discard_dcache_range, "ax", %progbits
.align 2
.global discard_dcache_range
.type discard_dcache_range, %function
@ -90,7 +90,7 @@ discard_dcache_range:
dump_dcache_range:
add r1, r0, r1 @ size -> end
cmp r1, r0 @ end <= start?
bxls lr @
bxls lr @
tst r0, #31 @ Check first line for bits set
bicne r0, r0, #31 @ Clear low five bits (down)
mcrne p15, 0, r0, c7, c14, 1 @ Clean and invalidate line by MVA
@ -114,7 +114,7 @@ dump_dcache_range:
* Write entire DCache back to RAM
* void commit_dcache(void);
*/
.section .text, "ax", %progbits
.section .text.commit_dcache, "ax", %progbits
.align 2
.global commit_dcache
.type commit_dcache, %function
@ -136,7 +136,7 @@ cpucache_flush:
* Clean and invalidate entire DCache, will do writeback
* void commit_discard_dcache(void);
*/
.section .icode, "ax", %progbits
.section .icode.commit_discard_dcache, "ax", %progbits
.align 2
.global commit_discard_dcache
.type commit_discard_dcache, %function
@ -149,13 +149,13 @@ invalidate_dcache:
mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier
bx lr @
.size commit_discard_dcache, .-commit_discard_dcache
/*
* Discards the entire ICache, and commit+discards the entire DCache
* void cpucache_commit_discard(void);
*/
.section .icode, "ax", %progbits
.section .icode.cpucache_commit_discard, "ax", %progbits
.align 2
.global cpucache_commit_discard
.type cpucache_commit_discard, %function

6
firmware/target/arm/s3c2440/app.lds
View file

@ -43,9 +43,8 @@ SECTIONS
.text :
{
_textstart = .;
*(.text)
*(.text*)
*(.icode)
*(.icode*)
*(.glue_7)
*(.glue_7t)
. = ALIGN(0x4);
@ -55,10 +54,7 @@ SECTIONS
.rodata :
{
*(.rodata) /* problems without this, dunno why */
*(.rodata*)
*(.rodata.str1.1)
*(.rodata.str1.4)
*(.irodata*)
. = ALIGN(0x4);
} > DRAM

12
firmware/target/arm/s3c2440/boot.lds
View file

@ -31,9 +31,8 @@ SECTIONS
.text :
{
_textstart = .;
*(.text)
*(.text*)
*(.icode)
*(.icode*)
*(.glue_7)
*(.glue_7t)
. = ALIGN(0x4);
@ -43,18 +42,15 @@ SECTIONS
.rodata :
{
*(.rodata) /* problems without this, dunno why */
*(.rodata*)
*(.rodata.str1.1)
*(.rodata.str1.4)
*(.irodata)
*(.irodata*)
. = ALIGN(0x4);
} > DRAM
.data :
{
*(.data*)
*(.idata)
*(.idata*)
. = ALIGN(0x4);
} > DRAM
@ -77,7 +73,7 @@ SECTIONS
{
_edata = .;
*(.bss*)
*(.ibss)
*(.ibss*)
*(COMMON)
. = ALIGN(0x4);
_end = .;

11
firmware/target/arm/sandisk/app.lds
View file

@ -51,10 +51,7 @@ SECTIONS
.rodata :
{
*(.rodata) /* problems without this, dunno why */
*(.rodata*)
*(.rodata.str1.1)
*(.rodata.str1.4)
. = ALIGN(0x4);
} > DRAM
@ -95,7 +92,7 @@ SECTIONS
{
_iedata = .;
*(.qharray)
*(.ibss)
*(.ibss*)
. = ALIGN(0x4);
_iend = .;
} > IRAM
@ -103,9 +100,9 @@ SECTIONS
.iram _iend :
{
_iramstart = .;
*(.icode)
*(.irodata)
*(.idata)
*(.icode*)
*(.irodata*)
*(.idata*)
. = ALIGN(0x4);
_iramend = .;
} > IRAM AT> DRAM

11
firmware/target/arm/tcc780x/app.lds
View file

@ -51,10 +51,7 @@ SECTIONS
.rodata :
{
*(.rodata) /* problems without this, dunno why */
*(.rodata*)
*(.rodata.str1.1)
*(.rodata.str1.4)
. = ALIGN(0x4);
} > DRAM
@ -97,9 +94,9 @@ SECTIONS
.iram :
{
_iramstart = .;
*(.irodata)
*(.idata)
*(.icode)
*(.irodata*)
*(.idata*)
*(.icode*)
. = ALIGN(0x4);
_iramend = .;
} > SRAM AT> DRAM
@ -109,7 +106,7 @@ SECTIONS
.ibss (NOLOAD) :
{
_iedata = .;
*(.ibss)
*(.ibss*)
. = ALIGN(0x4);
_iend = .;
} > SRAM

9
firmware/target/arm/tcc780x/boot.lds
View file

@ -27,16 +27,15 @@ SECTIONS
{
.text : {
*(.init.text)
*(.text)
*(.text*)
*(.glue_7)
*(.glue_7t)
} > DRAM
.data : {
*(.icode)
*(.irodata)
*(.idata)
*(.icode*)
*(.irodata*)
*(.idata*)
*(.data*)
*(.rodata.*)
. = ALIGN(0x4);
@ -55,7 +54,7 @@ SECTIONS
.bss (NOLOAD) : {
_edata = .;
*(.bss*);
*(.ibss);
*(.ibss*);
*(COMMON)
_end = .;
} > DRAM

8
firmware/target/arm/tms320dm320/app.lds
View file

@ -115,9 +115,9 @@ SECTIONS
{
. = ALIGN(0x4);
_iramstart = .;
*(.icode)
*(.irodata)
*(.idata)
*(.icode*)
*(.irodata*)
*(.idata*)
_iramend = .;
} > ITCM AT> DRAM
@ -137,7 +137,7 @@ SECTIONS
{
. = ALIGN(0x4);
_ibss_start = .;
*(.ibss)
*(.ibss*)
_ibss_end = .;
} > ITCM

8
firmware/target/arm/tms320dm320/boot.lds
View file

@ -136,9 +136,9 @@ SECTIONS
{
. = ALIGN(0x4);
_iramstart = .;
*(.icode)
*(.irodata)
*(.idata)
*(.icode*)
*(.irodata*)
*(.idata*)
_iramend = .;
} > IRAM AT> FLASH
@ -148,7 +148,7 @@ SECTIONS
{
. = ALIGN(0x4);
_ibss_start = .;
*(.ibss)
*(.ibss*)
_ibss_end = .;
} > IRAM