2008-03-27 23:58:03 +00:00
|
|
|
#include "config.h"
|
|
|
|
|
2011-02-06 20:17:15 +00:00
|
|
|
ENTRY(_vectors)
|
2009-04-01 03:21:18 +00:00
|
|
|
|
2008-03-27 23:58:03 +00:00
|
|
|
OUTPUT_FORMAT(elf32-littlearm)
|
|
|
|
OUTPUT_ARCH(arm)
|
2008-04-29 06:19:32 +00:00
|
|
|
STARTUP(target/arm/tms320dm320/crt0.o)
|
2008-03-27 23:58:03 +00:00
|
|
|
|
2009-04-10 04:48:44 +00:00
|
|
|
#ifndef LCD_NATIVE_WIDTH
|
|
|
|
#define LCD_NATIVE_WIDTH LCD_WIDTH
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifndef LCD_NATIVE_HEIGHT
|
|
|
|
#define LCD_NATIVE_HEIGHT LCD_HEIGHT
|
|
|
|
#endif
|
|
|
|
|
2009-04-01 03:21:18 +00:00
|
|
|
/* must be 16Kb (0x4000) aligned */
|
|
|
|
#define TTB_SIZE (0x4000)
|
|
|
|
|
2021-07-08 16:23:18 +00:00
|
|
|
/* Bootloader only uses/knows about the upper 32 M */
|
|
|
|
#define DRAMSIZE (MEMORYSIZE * 0x100000 / 2)
|
|
|
|
#define DRAMORIG CONFIG_SDRAM_START+DRAMSIZE
|
|
|
|
|
|
|
|
#ifdef MROBE_500
|
|
|
|
#define LCD_FUDGE LCD_NATIVE_WIDTH%32
|
|
|
|
#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
|
2009-12-15 01:30:59 +00:00
|
|
|
/* Give this some memory to allow it to align to the MMU boundary.
|
|
|
|
* Note that since there are two buffers (YUV/RGB) it calculates the approximate
|
|
|
|
* memory needed in steps of 1 Meg.
|
|
|
|
*/
|
2021-07-08 16:23:18 +00:00
|
|
|
#define LCD_TTB_AREA (0x100000*((LCD_BUFFER_SIZE>>19)+1))
|
|
|
|
/* End of the audio buffer, where the codec buffer starts */
|
|
|
|
#define TTB_BEGIN (DRAMORIG + DRAMSIZE - LCD_TTB_AREA)
|
|
|
|
#else
|
|
|
|
#define LCD_BUFFER_SIZE (LCD_NATIVE_WIDTH*LCD_NATIVE_HEIGHT*2)
|
|
|
|
#define LCD_TTB_AREA (TTB_SIZE + LCD_BUFFER_SIZE)
|
|
|
|
#define LCD_BEGIN (DRAMORIG + DRAMSIZE - LCD_TTB_AREA)
|
|
|
|
#endif
|
2008-03-27 23:58:03 +00:00
|
|
|
|
2009-04-10 04:48:44 +00:00
|
|
|
#define IRAMORIG 0x00000000
|
|
|
|
#define IRAMSIZE 0x4000
|
2011-02-06 20:17:15 +00:00
|
|
|
|
2016-05-19 17:57:20 +00:00
|
|
|
#define FLASHORIG 0x00100000
|
|
|
|
|
2011-11-16 14:08:01 +00:00
|
|
|
#ifdef SANSA_CONNECT
|
|
|
|
/* Offset in flash from beginning, we don't want overwrite OF bootloader
|
2021-05-20 19:16:46 +00:00
|
|
|
* due to recovery mode and more importantly - hardware block protection.
|
|
|
|
* Rockbox bootloader is flashed into kernel partition and chainloaded
|
|
|
|
* from OF bootloader via Arbitrary Code Execution exploit. The first
|
|
|
|
* instruction must be position independent as Rockbox bootloader will be
|
|
|
|
* copied to RAM at 0x01000000 and executed from RAM.
|
|
|
|
*/
|
2016-05-19 17:57:20 +00:00
|
|
|
#define FLASHSIZE 0x00400000
|
|
|
|
#define FLASHMEMORIG 0x00120010
|
|
|
|
/* Kernel partition is 2 M, srr header is 16 bytes, sig is 2048 bytes */
|
|
|
|
#define FLASHMEMSIZE 0x001FF7F0
|
2011-11-16 14:08:01 +00:00
|
|
|
#else
|
2016-05-19 17:57:20 +00:00
|
|
|
/* On targets other than Sansa Connect use whole flash for bootloader */
|
|
|
|
#define FLASHSIZE 0x00800000
|
|
|
|
#define FLASHMEMORIG FLASHORIG
|
|
|
|
#define FLASHMEMSIZE FLASHSIZE
|
2011-11-16 14:08:01 +00:00
|
|
|
#endif
|
|
|
|
|
2011-02-06 20:17:15 +00:00
|
|
|
PRO_STACK_SIZE = 0x2000;
|
|
|
|
IRQ_STACK_SIZE = 0x400;
|
|
|
|
FIQ_STACK_SIZE = 0x400;
|
2009-04-01 03:21:18 +00:00
|
|
|
|
2008-03-27 23:58:03 +00:00
|
|
|
MEMORY
|
|
|
|
{
|
|
|
|
DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
|
|
|
|
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
|
2016-05-19 17:57:20 +00:00
|
|
|
FLASH : ORIGIN = FLASHMEMORIG, LENGTH = FLASHMEMSIZE
|
2008-03-27 23:58:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SECTIONS
|
|
|
|
{
|
2011-02-06 20:17:15 +00:00
|
|
|
/* Set up variables needed for memory initialization */
|
|
|
|
_sdram_start = DRAMORIG;
|
|
|
|
_sdram_sizem = (DRAMSIZE / 0x100000);
|
|
|
|
|
|
|
|
_flash_start = FLASHORIG;
|
|
|
|
_flash_sizem = (FLASHSIZE / 0x100000);
|
|
|
|
|
|
|
|
.vectors :
|
|
|
|
{
|
|
|
|
_vectorsstart = .;
|
|
|
|
KEEP(*(.vectors))
|
|
|
|
_vectorsend = .;
|
|
|
|
} > IRAM AT> FLASH
|
|
|
|
_vectorscopy = LOADADDR(.vectors);
|
2008-03-27 23:58:03 +00:00
|
|
|
|
2011-02-06 20:17:15 +00:00
|
|
|
/* crt0.S initialization */
|
|
|
|
.init :
|
|
|
|
{
|
|
|
|
. = ALIGN(0x4);
|
2008-03-27 23:58:03 +00:00
|
|
|
_loadaddress = .;
|
2011-02-06 20:17:15 +00:00
|
|
|
*(.init)
|
|
|
|
} > FLASH
|
|
|
|
|
|
|
|
/* Program code */
|
|
|
|
.text :
|
|
|
|
{
|
2008-03-27 23:58:03 +00:00
|
|
|
. = ALIGN(0x4);
|
2011-02-06 20:17:15 +00:00
|
|
|
*(.text*)
|
|
|
|
} > FLASH
|
2008-03-27 23:58:03 +00:00
|
|
|
|
2011-02-06 20:17:15 +00:00
|
|
|
/* Thumb interworking sections - for some reason LD dies even if these
|
|
|
|
* sections are empty.
|
|
|
|
*/
|
|
|
|
.glue :
|
|
|
|
{
|
|
|
|
. = ALIGN(0x4);
|
|
|
|
*(.glue_7) /* ARM calling Thumb */
|
|
|
|
*(.glue_7t) /* Thumb calling ARM */
|
|
|
|
} > FLASH
|
|
|
|
|
|
|
|
/* Read-only data */
|
2008-03-27 23:58:03 +00:00
|
|
|
.rodata :
|
|
|
|
{
|
|
|
|
. = ALIGN(0x4);
|
2011-02-06 20:17:15 +00:00
|
|
|
*(.rodata*)
|
|
|
|
} > FLASH
|
2008-03-27 23:58:03 +00:00
|
|
|
|
2011-02-06 20:17:15 +00:00
|
|
|
/* Dynamic data - this needs to be copied out of flash before it is used. */
|
|
|
|
.data :
|
|
|
|
{
|
|
|
|
. = ALIGN(0x4);
|
|
|
|
_dramstart = .;
|
2008-03-27 23:58:03 +00:00
|
|
|
*(.data*)
|
2011-02-06 20:17:15 +00:00
|
|
|
_dramend = .;
|
|
|
|
} > DRAM AT> FLASH
|
|
|
|
_dramcopy = LOADADDR(.data);
|
|
|
|
|
|
|
|
.bss (NOLOAD) :
|
|
|
|
{
|
2008-03-27 23:58:03 +00:00
|
|
|
. = ALIGN(0x4);
|
2011-02-06 20:17:15 +00:00
|
|
|
_bss_start = .;
|
|
|
|
*(.bss*)
|
|
|
|
*(COMMON)
|
|
|
|
_bss_end = .;
|
2008-03-27 23:58:03 +00:00
|
|
|
} > DRAM
|
|
|
|
|
2009-04-10 04:48:44 +00:00
|
|
|
.iram :
|
2009-04-01 03:21:18 +00:00
|
|
|
{
|
2011-02-06 20:17:15 +00:00
|
|
|
. = ALIGN(0x4);
|
2009-04-10 04:48:44 +00:00
|
|
|
_iramstart = .;
|
2011-12-17 01:43:32 +00:00
|
|
|
*(.icode*)
|
|
|
|
*(.irodata*)
|
|
|
|
*(.idata*)
|
2009-04-10 04:48:44 +00:00
|
|
|
_iramend = .;
|
2011-02-06 20:17:15 +00:00
|
|
|
} > IRAM AT> FLASH
|
2009-04-10 04:48:44 +00:00
|
|
|
|
|
|
|
_iramcopy = LOADADDR(.iram);
|
2021-07-08 16:23:18 +00:00
|
|
|
|
2009-04-10 04:48:44 +00:00
|
|
|
.ibss (NOLOAD) :
|
|
|
|
{
|
|
|
|
. = ALIGN(0x4);
|
2011-02-06 20:17:15 +00:00
|
|
|
_ibss_start = .;
|
2011-12-17 01:43:32 +00:00
|
|
|
*(.ibss*)
|
2011-02-06 20:17:15 +00:00
|
|
|
_ibss_end = .;
|
2009-04-10 04:48:44 +00:00
|
|
|
} > IRAM
|
|
|
|
|
2011-02-06 20:17:15 +00:00
|
|
|
/* Program stack space */
|
2021-07-08 16:23:18 +00:00
|
|
|
.pro_stack (NOLOAD):
|
2009-08-12 02:34:07 +00:00
|
|
|
{
|
2011-02-06 20:17:15 +00:00
|
|
|
. = ALIGN(0x4);
|
|
|
|
*(.stack)
|
|
|
|
stackbegin = .; /* Variable for thread.c */
|
2021-07-08 16:23:18 +00:00
|
|
|
_pro_stack_end = .;
|
2011-02-06 20:17:15 +00:00
|
|
|
. += PRO_STACK_SIZE;
|
|
|
|
_pro_stack_start = .;
|
|
|
|
stackend = .; /* Variable for tread.c */
|
2009-08-12 02:34:07 +00:00
|
|
|
} > IRAM
|
2011-02-06 20:17:15 +00:00
|
|
|
|
|
|
|
/* IRQ stack space */
|
|
|
|
.irq_stack (NOLOAD):
|
2009-08-12 02:34:07 +00:00
|
|
|
{
|
2011-02-06 20:17:15 +00:00
|
|
|
. = ALIGN(0x4);
|
|
|
|
_irq_stack_end = .;
|
|
|
|
. += IRQ_STACK_SIZE;
|
|
|
|
_irq_stack_start = .;
|
2009-08-12 02:34:07 +00:00
|
|
|
} > IRAM
|
2011-02-06 20:17:15 +00:00
|
|
|
|
|
|
|
/* FIQ stack space */
|
|
|
|
.fiq_stack (NOLOAD):
|
2009-04-10 04:48:44 +00:00
|
|
|
{
|
|
|
|
. = ALIGN(0x4);
|
2011-02-06 20:17:15 +00:00
|
|
|
_fiq_stack_end = .;
|
|
|
|
. += FIQ_STACK_SIZE;
|
|
|
|
_fiq_stack_start = .;
|
|
|
|
} > IRAM
|
2021-07-08 16:23:18 +00:00
|
|
|
|
|
|
|
#ifdef MROBE_500
|
2009-04-10 04:48:44 +00:00
|
|
|
.ttbtable TTB_BEGIN (NOLOAD) :
|
2009-04-01 03:21:18 +00:00
|
|
|
{
|
2009-04-10 04:48:44 +00:00
|
|
|
. = ALIGN (0x4000);
|
2009-04-01 03:21:18 +00:00
|
|
|
_ttbstart = .;
|
2009-04-10 04:48:44 +00:00
|
|
|
. += TTB_SIZE;
|
|
|
|
} > DRAM
|
2021-07-08 16:23:18 +00:00
|
|
|
|
2009-06-08 00:19:16 +00:00
|
|
|
/* The LCD buffer should be at the end of memory to protect against
|
2021-07-08 16:23:18 +00:00
|
|
|
* overflowing something else when the YUV blitter is fudging the screen
|
2009-06-08 00:19:16 +00:00
|
|
|
* size.
|
|
|
|
*/
|
2021-07-08 16:23:18 +00:00
|
|
|
|
2009-04-10 04:48:44 +00:00
|
|
|
.lcdbuffer (NOLOAD) :
|
|
|
|
{
|
|
|
|
_lcdbuf = .;
|
|
|
|
. += LCD_BUFFER_SIZE;
|
|
|
|
} > DRAM
|
2021-07-08 16:23:18 +00:00
|
|
|
|
2009-06-08 00:19:16 +00:00
|
|
|
.lcdbuffer2 (NOLOAD) :
|
|
|
|
{
|
|
|
|
_lcdbuf2 = .;
|
|
|
|
. += LCD_BUFFER_SIZE;
|
|
|
|
} > DRAM
|
2021-07-08 16:23:18 +00:00
|
|
|
#else
|
|
|
|
.lcdbuffer LCD_BEGIN (NOLOAD) :
|
|
|
|
{
|
|
|
|
. = ALIGN(32);
|
|
|
|
_lcdbuf = .;
|
|
|
|
. += LCD_BUFFER_SIZE;
|
|
|
|
} > DRAM
|
|
|
|
|
|
|
|
/* Place TTB at the end of RAM to minimize alignment losses */
|
|
|
|
.ttbtable (NOLOAD) :
|
|
|
|
{
|
|
|
|
. = ALIGN (0x4000);
|
|
|
|
_ttbstart = .;
|
|
|
|
. += TTB_SIZE;
|
|
|
|
} > DRAM
|
|
|
|
#endif
|
2008-03-27 23:58:03 +00:00
|
|
|
}
|