2008-07-14 15:03:10 +00:00
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#include "config.h"
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#undef mips
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2008-07-30 09:54:25 +00:00
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OUTPUT_FORMAT("elf32-littlemips")
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2008-07-14 15:03:10 +00:00
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OUTPUT_ARCH(MIPS)
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ENTRY(_start)
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STARTUP(target/mips/ingenic_jz47xx/crt0.o)
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2009-02-09 10:02:38 +00:00
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#define DRAMSIZE ((MEMORYSIZE-4) * 0x100000)
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2008-07-14 15:03:10 +00:00
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2009-02-09 10:02:38 +00:00
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#define DRAMORIG 0x80404000
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2008-07-14 15:03:10 +00:00
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#define IRAMORIG 0x80000000
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#define IRAMSIZE 16K
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MEMORY
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{
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
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}
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SECTIONS
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{
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. = DRAMORIG;
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2008-08-09 23:31:38 +00:00
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.text :
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{
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2008-07-14 15:03:10 +00:00
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_loadaddress = .;
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*(.init.text);
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*(.text*);
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} > DRAM
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. = ALIGN(4);
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.rodata :
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{
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*(.rodata*);
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} > DRAM
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2009-02-09 10:02:38 +00:00
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. = ALIGN(4);
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2008-07-14 15:03:10 +00:00
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2008-08-09 23:31:38 +00:00
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.data :
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{
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2008-07-14 15:03:10 +00:00
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*(.data*);
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*(.sdata*);
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2009-02-09 10:02:38 +00:00
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*(.rel.dyn);
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2008-07-14 15:03:10 +00:00
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} > DRAM
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2009-02-09 10:02:38 +00:00
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. = ALIGN(4);
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.iram IRAMORIG:
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2008-08-09 23:31:38 +00:00
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{
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2009-02-09 10:02:38 +00:00
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_iramstart = .;
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*(.vectors.1);
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. = 0x100;
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*(.vectors.2);
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. = 0x180;
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*(.vectors.3);
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. = 0x200;
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*(.vectors.4);
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*(.vectors);
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*(.icode);
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*(.irodata);
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*(.idata);
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KEEP(*(.vectors*))
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_iramend = .;
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} > IRAM AT> DRAM
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_iramcopy = LOADADDR(.iram);
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2008-07-14 15:03:10 +00:00
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. = ALIGN(4);
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2009-02-09 10:02:38 +00:00
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.bss (NOLOAD):
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2008-07-14 15:03:10 +00:00
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{
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_edata = .;
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*(.sbss*);
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*(.bss*);
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2009-02-09 10:02:38 +00:00
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*(COMMON);
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2008-08-06 20:39:02 +00:00
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*(.scommon*);
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2008-07-14 15:03:10 +00:00
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_end = .;
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} > DRAM
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2008-08-26 21:48:49 +00:00
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2009-02-09 10:02:38 +00:00
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_bootend = .;
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2008-08-26 21:48:49 +00:00
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.ibss (NOLOAD) :
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{
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_iedata = .;
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2009-02-09 10:02:38 +00:00
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*(.ibss*)
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2008-08-26 21:48:49 +00:00
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_iend = .;
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} > IRAM
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2009-02-09 10:02:38 +00:00
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. = ALIGN(4);
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.stack (NOLOAD):
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2008-08-26 21:48:49 +00:00
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{
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*(.stack)
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stackbegin = .;
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. += 0x2000;
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stackend = .;
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} > IRAM
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2008-07-14 15:03:10 +00:00
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}
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