fe2d52cc7d
Nothing in the core has used it for some time. It's exported to the plugin API but the last plugins to use it were switched to the mixer API back in 2011. This allows us to get rid of pcm_play_dma_pause() from all audio drivers Change-Id: Ic3fa02592316f84963e41d792d1cabb436d1ff6b
451 lines
12 KiB
C
451 lines
12 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 by Michael Sevakis
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <stdlib.h>
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#include "system.h"
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#include "kernel.h"
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#include "audio.h"
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#include "sound.h"
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#include "sdma-imx31.h"
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#include "mmu-imx31.h"
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#include "pcm-internal.h"
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#define DMA_PLAY_CH_NUM 2
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#define DMA_REC_CH_NUM 1
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#define DMA_PLAY_CH_PRIORITY 6
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#define DMA_REC_CH_PRIORITY 6
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static struct buffer_descriptor dma_play_bd NOCACHEBSS_ATTR;
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static void play_dma_callback(void);
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static struct channel_descriptor dma_play_cd =
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{
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.bd_count = 1,
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.callback = play_dma_callback,
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.shp_addr = SDMA_PER_ADDR_SSI2_TX1,
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.wml = SDMA_SSI_TXFIFO_WML*2,
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.per_type = SDMA_PER_SSI_SHP, /* SSI2 shared with SDMA core */
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.tran_type = SDMA_TRAN_EMI_2_PER,
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.event_id1 = SDMA_REQ_SSI2_TX1,
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};
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/* The pcm locking relies on the fact the interrupt handlers run to completion
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* before lower-priority modes proceed. We don't have to touch hardware
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* registers. Disabling SDMA interrupt would disable DMA callbacks systemwide
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* and that is not something that is desireable.
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*
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* Lock explanation [++.locked]:
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* Trivial, just increment .locked.
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*
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* Unlock explanation [if (--.locked == 0 && .state != 0)]:
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* If int occurred and saw .locked as nonzero, we'll get a pending
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* and it will have taken no action other than to set the flag to the
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* value of .state. If it saw zero for .locked, it will have proceeded
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* normally into the pcm callbacks. If cb set the pending flag, it has
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* to be called to kickstart the callback mechanism and DMA. If the unlock
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* came after a stop, we won't be in the block and DMA will be off. If
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* we're still doing transfers, cb will see 0 for .locked and if pending,
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* it won't be called by DMA again. */
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struct dma_data
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{
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int locked;
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int callback_pending; /* DMA interrupt happened while locked */
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int state;
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};
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static struct dma_data dma_play_data =
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{
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/* Initialize to an unlocked, stopped state */
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.locked = 0,
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.callback_pending = 0,
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.state = 0
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};
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static void play_start_dma(const void *addr, size_t size)
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{
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commit_dcache_range(addr, size);
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dma_play_bd.buf_addr = (void *)addr_virt_to_phys((unsigned long)addr);
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dma_play_bd.mode.count = size;
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dma_play_bd.mode.command = TRANSFER_16BIT;
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dma_play_bd.mode.status = BD_DONE | BD_WRAP | BD_INTR;
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sdma_channel_run(DMA_PLAY_CH_NUM);
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}
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static void play_dma_callback(void)
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{
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if (dma_play_data.locked != 0)
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{
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/* Callback is locked out */
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dma_play_data.callback_pending = dma_play_data.state;
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return;
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}
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/* Inform of status and get new buffer */
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enum pcm_dma_status status = (dma_play_bd.mode.status & BD_RROR) ?
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PCM_DMAST_ERR_DMA : PCM_DMAST_OK;
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const void *addr;
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size_t size;
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if (pcm_play_dma_complete_callback(status, &addr, &size))
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{
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play_start_dma(addr, size);
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pcm_play_dma_status_callback(PCM_DMAST_STARTED);
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}
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}
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void pcm_play_lock(void)
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{
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++dma_play_data.locked;
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}
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void pcm_play_unlock(void)
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{
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if (--dma_play_data.locked == 0 && dma_play_data.state != 0)
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{
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int oldstatus = disable_irq_save();
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int pending = dma_play_data.callback_pending;
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dma_play_data.callback_pending = 0;
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restore_irq(oldstatus);
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if (pending != 0)
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play_dma_callback();
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}
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}
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void pcm_dma_apply_settings(void)
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{
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audiohw_set_frequency(pcm_fsel);
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}
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void pcm_play_dma_init(void)
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{
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/* Init DMA channel information */
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sdma_channel_init(DMA_PLAY_CH_NUM, &dma_play_cd, &dma_play_bd);
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sdma_channel_set_priority(DMA_PLAY_CH_NUM, DMA_PLAY_CH_PRIORITY);
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/* Init audio interfaces */
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audiohw_init();
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}
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void pcm_play_dma_postinit(void)
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{
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audiohw_postinit();
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}
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static void play_start_pcm(void)
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{
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/* Stop transmission (if in progress) */
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SSI_SCR2 &= ~SSI_SCR_TE;
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SSI_SCR2 |= SSI_SCR_SSIEN; /* Enable SSI */
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SSI_STCR2 |= SSI_STCR_TFEN0; /* Enable TX FIFO */
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dma_play_data.state = 1; /* Check callback on unlock */
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/* Do prefill to prevent swapped channels (see TLSbo61214 in MCIMX31CE).
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* No actual solution was offered but this appears to work. */
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SSI_STX0_2 = 0;
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SSI_STX0_2 = 0;
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SSI_STX0_2 = 0;
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SSI_STX0_2 = 0;
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SSI_SIER2 |= SSI_SIER_TDMAE; /* Enable DMA req. */
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SSI_SCR2 |= SSI_SCR_TE; /* Start transmitting */
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}
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static void play_stop_pcm(void)
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{
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SSI_SIER2 &= ~SSI_SIER_TDMAE; /* Disable DMA req. */
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/* Set state before pending to prevent race with interrupt */
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dma_play_data.state = 0;
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/* Wait for FIFO to empty */
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while (SSI_SFCSR_TFCNT0 & SSI_SFCSR2);
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SSI_STCR2 &= ~SSI_STCR_TFEN0; /* Disable TX */
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SSI_SCR2 &= ~(SSI_SCR_TE | SSI_SCR_SSIEN); /* Disable transmission, SSI */
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if (pcm_playing)
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{
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/* Stopping: clear buffer info to ensure 0-size readbacks when
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* stopped */
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unsigned long dsa = 0;
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dma_play_bd.buf_addr = NULL;
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dma_play_bd.mode.count = 0;
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discard_dcache_range(&dsa, sizeof(dsa));
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sdma_write_words(&dsa, CHANNEL_CONTEXT_ADDR(DMA_PLAY_CH_NUM)+0x0b, 1);
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}
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/* Clear any pending callback */
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dma_play_data.callback_pending = 0;
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}
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void pcm_play_dma_start(const void *addr, size_t size)
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{
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sdma_channel_stop(DMA_PLAY_CH_NUM);
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/* Disable transmission */
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SSI_STCR2 &= ~SSI_STCR_TFEN0;
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SSI_SCR2 &= ~(SSI_SCR_TE | SSI_SCR_SSIEN);
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if (!sdma_channel_reset(DMA_PLAY_CH_NUM))
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return;
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/* Begin I2S transmission */
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play_start_pcm();
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/* Begin DMA transfer */
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play_start_dma(addr, size);
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}
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void pcm_play_dma_stop(void)
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{
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sdma_channel_stop(DMA_PLAY_CH_NUM);
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play_stop_pcm();
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}
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/* Return the number of bytes waiting - full L-R sample pairs only */
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size_t pcm_get_bytes_waiting(void)
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{
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static unsigned long dsa NOCACHEBSS_ATTR;
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long offs, size;
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int oldstatus;
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/* read burst dma source address register in channel context */
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sdma_read_words(&dsa, CHANNEL_CONTEXT_ADDR(DMA_PLAY_CH_NUM)+0x0b, 1);
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oldstatus = disable_irq_save();
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offs = dsa - (unsigned long)dma_play_bd.buf_addr;
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size = dma_play_bd.mode.count;
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restore_irq(oldstatus);
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/* Be addresses are coherent (no buffer change during read) */
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if (offs >= 0 && offs < size)
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{
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return (size - offs) & ~3;
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}
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return 0;
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}
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/* Return a pointer to the samples and the number of them in *count */
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const void * pcm_play_dma_get_peak_buffer(int *count)
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{
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static unsigned long dsa NOCACHEBSS_ATTR;
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unsigned long addr;
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long offs, size;
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int oldstatus;
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/* read burst dma source address register in channel context */
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sdma_read_words(&dsa, CHANNEL_CONTEXT_ADDR(DMA_PLAY_CH_NUM)+0x0b, 1);
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oldstatus = disable_irq_save();
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addr = dsa;
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offs = addr - (unsigned long)dma_play_bd.buf_addr;
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size = dma_play_bd.mode.count;
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restore_irq(oldstatus);
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/* Be addresses are coherent (no buffer change during read) */
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if (offs >= 0 && offs < size)
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{
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*count = (size - offs) >> 2;
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return (void *)((addr + 2) & ~3);
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}
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*count = 0;
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return NULL;
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}
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void * pcm_dma_addr(void *addr)
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{
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return (void *)addr_virt_to_phys((unsigned long)addr);
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}
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#ifdef HAVE_RECORDING
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static struct buffer_descriptor dma_rec_bd NOCACHEBSS_ATTR;
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static void rec_dma_callback(void);
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static struct channel_descriptor dma_rec_cd =
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{
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.bd_count = 1,
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.callback = rec_dma_callback,
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.shp_addr = SDMA_PER_ADDR_SSI1_RX1,
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.wml = SDMA_SSI_RXFIFO_WML*2,
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.per_type = SDMA_PER_SSI,
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.tran_type = SDMA_TRAN_PER_2_EMI,
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.event_id1 = SDMA_REQ_SSI1_RX1,
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};
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static struct dma_data dma_rec_data =
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{
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/* Initialize to an unlocked, stopped state */
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.locked = 0,
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.callback_pending = 0,
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.state = 0
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};
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static void rec_start_dma(void *addr, size_t size)
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{
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discard_dcache_range(addr, size);
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addr = (void *)addr_virt_to_phys((unsigned long)addr);
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dma_rec_bd.buf_addr = addr;
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dma_rec_bd.mode.count = size;
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dma_rec_bd.mode.command = TRANSFER_16BIT;
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dma_rec_bd.mode.status = BD_DONE | BD_WRAP | BD_INTR;
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sdma_channel_run(DMA_REC_CH_NUM);
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}
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static void rec_dma_callback(void)
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{
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if (dma_rec_data.locked != 0)
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{
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dma_rec_data.callback_pending = dma_rec_data.state;
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return; /* Callback is locked out */
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}
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/* Inform middle layer */
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enum pcm_dma_status status = (dma_rec_bd.mode.status & BD_RROR) ?
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PCM_DMAST_ERR_DMA : PCM_DMAST_OK;
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void *addr;
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size_t size;
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if (pcm_rec_dma_complete_callback(status, &addr, &size))
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{
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rec_start_dma(addr, size);
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pcm_rec_dma_status_callback(PCM_DMAST_STARTED);
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}
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}
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void pcm_rec_lock(void)
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{
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++dma_rec_data.locked;
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}
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void pcm_rec_unlock(void)
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{
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if (--dma_rec_data.locked == 0 && dma_rec_data.state != 0)
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{
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int oldstatus = disable_irq_save();
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int pending = dma_rec_data.callback_pending;
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dma_rec_data.callback_pending = 0;
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restore_irq(oldstatus);
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if (pending != 0)
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rec_dma_callback();
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}
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}
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void pcm_rec_dma_stop(void)
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{
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SSI_SIER1 &= ~SSI_SIER_RDMAE; /* Disable DMA req. */
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/* Set state before pending to prevent race with interrupt */
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dma_rec_data.state = 0;
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/* Stop receiving data */
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sdma_channel_stop(DMA_REC_CH_NUM);
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bitclr32(&SSI_SIER1, SSI_SIER_RDMAE);
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SSI_SCR1 &= ~SSI_SCR_RE; /* Disable RX */
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SSI_SRCR1 &= ~SSI_SRCR_RFEN0; /* Disable RX FIFO */
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if (pcm_recording)
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{
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/* Stopping: clear buffer info to ensure 0-size readbacks when
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* stopped */
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unsigned long pda = 0;
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dma_rec_bd.buf_addr = NULL;
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dma_rec_bd.mode.count = 0;
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discard_dcache_range(&pda, sizeof(pda));
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sdma_write_words(&pda, CHANNEL_CONTEXT_ADDR(DMA_REC_CH_NUM)+0x0a, 1);
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}
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/* Clear any pending callback */
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dma_rec_data.callback_pending = 0;
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}
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void pcm_rec_dma_start(void *addr, size_t size)
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{
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pcm_rec_dma_stop();
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if (!sdma_channel_reset(DMA_REC_CH_NUM))
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return;
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SSI_SRCR1 |= SSI_SRCR_RFEN0; /* Enable RX FIFO */
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/* Ensure clear FIFO */
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while (SSI_SFCSR1 & SSI_SFCSR_RFCNT0)
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SSI_SRX0_1;
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/* Enable receive */
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SSI_SCR1 |= SSI_SCR_RE;
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SSI_SIER1 |= SSI_SIER_RDMAE; /* Enable DMA req. */
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/* Begin DMA transfer */
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rec_start_dma(addr, size);
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dma_rec_data.state = 1; /* Check callback on unlock */
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}
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void pcm_rec_dma_close(void)
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{
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pcm_rec_dma_stop();
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sdma_channel_close(DMA_REC_CH_NUM);
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}
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void pcm_rec_dma_init(void)
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{
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pcm_rec_dma_stop();
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/* Init channel information */
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sdma_channel_init(DMA_REC_CH_NUM, &dma_rec_cd, &dma_rec_bd);
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sdma_channel_set_priority(DMA_REC_CH_NUM, DMA_REC_CH_PRIORITY);
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}
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const void * pcm_rec_dma_get_peak_buffer(void)
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{
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static unsigned long pda NOCACHEBSS_ATTR;
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unsigned long buf, end, bufend;
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int oldstatus;
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/* read burst dma destination address register in channel context */
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sdma_read_words(&pda, CHANNEL_CONTEXT_ADDR(DMA_REC_CH_NUM)+0x0a, 1);
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oldstatus = disable_irq_save();
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end = pda;
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buf = (unsigned long)dma_rec_bd.buf_addr;
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bufend = buf + dma_rec_bd.mode.count;
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restore_irq(oldstatus);
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/* Be addresses are coherent (no buffer change during read) */
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if (end >= buf && end < bufend)
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return (void *)(end & ~3);
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return NULL;
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}
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#endif /* HAVE_RECORDING */
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