f8f3fab62c
build it on fuzev2 and clipv2 too, it should be the same controller as3525v1 file is only build for CONFIG_USBOTG == USBOTG_AS3525, no need to check for it in the .c file git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26142 a1c6a512-1295-4272-9138-f99709370657
264 lines
6.2 KiB
C
264 lines
6.2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright © 2010 Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "usb.h"
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#include "usb_drv.h"
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#include "as3525v2.h"
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#include "clock-target.h"
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#include "ascodec.h"
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#include "as3514.h"
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#include <stdbool.h>
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#include "panic.h"
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#define LOGF_ENABLE
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#include "logf.h"
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#include "usb-drv-as3525v2.h"
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struct usb_endpoint
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{
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void *buf;
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unsigned int len;
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union
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{
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unsigned int sent;
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unsigned int received;
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};
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bool wait;
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bool busy;
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};
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#if 0
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static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS*2];
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#endif
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void usb_attach(void)
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{
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usb_enable(true);
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}
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static void usb_delay(void)
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{
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int i = 0;
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while(i < 0x300)
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i++;
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}
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static void as3525v2_connect(void)
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{
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logf("usb: init as3525v2");
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/* 1) enable usb core clock */
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CGU_PERI |= CGU_USB_CLOCK_ENABLE;
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usb_delay();
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/* 2) enable usb phy clock */
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CGU_USB |= 0x20;
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usb_delay();
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/* 3) clear "stop pclk" */
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USB_PCGCCTL &= ~0x1;
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usb_delay();
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/* 4) clear "power clamp" */
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USB_PCGCCTL &= ~0x4;
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usb_delay();
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/* 5) clear "reset power down module" */
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USB_PCGCCTL &= ~0x8;
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usb_delay();
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/* 6) set "power on program done" */
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USB_DCTL |= 0x800;
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usb_delay();
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/* 7) core soft reset */
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USB_GRSTCTL |= USB_GRSTCTL_csftrst;
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usb_delay();
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/* 8) hclk soft reset */
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USB_GRSTCTL |= USB_GRSTCTL_hsftrst;
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usb_delay();
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/* 9) flush and reset everything */
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USB_GRSTCTL |= 0x3f;
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usb_delay();
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/* 10) force device mode*/
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USB_GUSBCFG &= ~0x20000000;
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USB_GUSBCFG |= 0x40000000;
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usb_delay();
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/* 11) Do something that is probably CCU related but undocumented*/
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CCU_USB_THINGY &= ~0x1000;
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usb_delay();
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/* 12) reset usb core parameters (dev addr, speed, ...) */
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USB_DCFG = 0;
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usb_delay();
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}
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static void core_reset(void)
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{
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unsigned int i = 0;
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/* Wait for AHB master IDLE state. */
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while((USB_GRSTCTL & USB_GRSTCTL_ahbidle) == 0);
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{
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/*udelay(10);*/
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sleep(1);
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}
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/* Core Soft Reset */
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USB_GRSTCTL |= USB_GRSTCTL_csftrst;
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/* Waits for the hardware to clear reset bit */
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while(USB_GRSTCTL & USB_GRSTCTL_csftrst && i < 0x300)
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i++;
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if(USB_GRSTCTL & USB_GRSTCTL_csftrst)
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{
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logf("oops, usb core soft reset hang :(");
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}
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/* Wait for 3 PHY Clocks */
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/*mdelay(100);*/
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sleep(1);
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logf("%ld endpoints", USB_GHWCFG2_NUM_EP);
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for(i = 0; i < USB_GHWCFG2_NUM_EP; i++)
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logf(" EP%d: IN=%ld OUT=%ld", i, USB_GHWCFG1_IN_EP(i), USB_GHWCFG1_OUT_EP(i));
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logf("hwcfg1: %08lx", USB_GHWCFG1);
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logf("hwcfg2: %08lx", USB_GHWCFG2);
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logf("hwcfg3: %08lx", USB_GHWCFG3);
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logf("hwcfg4: %08lx", USB_GHWCFG4);
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logf("%ld in ep", USB_GHWCFG4_NUM_IN_EP);
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logf("tot fifo sz: %ld", USB_GHWCFG3_DFIFO_LEN);
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logf("rx fifo sz: %ld", USB_GRXFSIZ);
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logf("tx fifo sz: %ld", USB_GNPTXFSIZ >> 16); /* there is no perio ep so print only non-perio */
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}
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static void core_init(void)
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{
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/* Reset the Controller */
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core_reset();
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/* Setup phy for high speed */
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/* 1) select utmi */
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/* fixme: the clip+ hardware support utmi only, this is useless */
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//USB_GUSBCFG &= ~USB_GUSBCFG_ulpi_utmi_sel;
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/* 2) select utmi 16-bit wide bus */
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USB_GUSBCFG |= USB_GUSBCFG_phy_if;
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/* 3) core reset */
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/* fixme: linux patch says the phy parameters survive the soft reset so
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* perhaps this part can be done only one type but I don't know
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* what happened when phy goes to standby mode and clock are disabled */
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core_reset();
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/* fixme: at this point, the linux patch sets ulpi bits to 0 on utmi selection
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* but the clip+ hardware does not support it so don't bother with
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* that */
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/* fixme: the current code is for internal DMA only, the clip+ architecture
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* define the internal DMA model */
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/* Set burstlen */
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USB_GAHBCFG |= USB_GAHBCFG_INT_DMA_BURST_INCR << USB_GAHBCFG_hburstlen_bit_pos;
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/* Enable DMA */
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USB_GAHBCFG |= USB_GAHBCFG_dma_enable;
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/* Disable HNP and SRP, not sure it's useful because we already forced dev mode */
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USB_GUSBCFG &= ~(USB_GUSBCFG_SRP_cap | USB_GUSBCFG_HNP_cap);
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}
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void usb_drv_init(void)
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{
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logf("usb_drv_init");
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as3525v2_connect();
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logf("usb: synopsis id: %lx", USB_GSNPSID);
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core_init();
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}
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void usb_drv_exit(void)
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{
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logf("usb_drv_exit");
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}
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int usb_drv_port_speed(void)
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{
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return 0;
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}
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int usb_drv_request_endpoint(int type, int dir)
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{
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(void) type;
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(void) dir;
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return -1;
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}
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void usb_drv_release_endpoint(int ep)
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{
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(void) ep;
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}
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void usb_drv_cancel_all_transfers(void)
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{
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}
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int usb_drv_recv(int ep, void *ptr, int len)
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{
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(void) ep;
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(void) ptr;
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(void) len;
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return -1;
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}
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int usb_drv_send(int ep, void *ptr, int len)
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{
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(void) ep;
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(void) ptr;
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(void) len;
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return -1;
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}
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int usb_drv_send_nonblocking(int ep, void *ptr, int len)
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{
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(void) ep;
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(void) ptr;
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(void) len;
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return -1;
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}
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/* interrupt service routine */
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void INT_USB(void)
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{
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panicf("USB interrupt !");
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}
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/* (not essential? , not implemented in usb-tcc.c) */
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void usb_drv_set_test_mode(int mode)
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{
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(void) mode;
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}
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void usb_drv_set_address(int address)
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{
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(void) address;
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}
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void usb_drv_stall(int ep, bool stall, bool in)
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{
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(void) ep;
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(void) stall;
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(void) in;
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}
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bool usb_drv_stalled(int ep, bool in)
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{
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(void) ep;
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(void) in;
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return true;
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}
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