7afea91560
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26889 a1c6a512-1295-4272-9138-f99709370657
281 lines
7.6 KiB
C
281 lines
7.6 KiB
C
/********************************************************************
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* *
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* THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. *
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* *
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* USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS *
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* GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE *
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* IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. *
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* *
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* THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 *
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* BY THE Xiph.Org FOUNDATION http://www.xiph.org/ *
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* *
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********************************************************************
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function: arm7 and later wide math functions
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********************************************************************/
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#ifdef CPU_ARM
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#if !defined(_V_WIDE_MATH) && !defined(_LOW_ACCURACY_)
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#define _V_WIDE_MATH
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#if ARM_ARCH >= 6
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static inline int32_t MULT32(int32_t x, int32_t y) {
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int32_t hi;
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asm volatile("smmul %[hi], %[x], %[y] \n\t"
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: [hi] "=&r" (hi)
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: [x] "r" (x), [y] "r" (y) );
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return(hi);
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}
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#else
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static inline int32_t MULT32(int32_t x, int32_t y) {
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int32_t lo, hi;
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asm volatile("smull\t%0, %1, %2, %3 \n\t"
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: "=&r"(lo),"=&r"(hi)
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: "r"(x),"r"(y) );
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return(hi);
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}
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#endif
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static inline int32_t MULT31(int32_t x, int32_t y) {
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return MULT32(x,y)<<1;
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}
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static inline int32_t MULT31_SHIFT15(int32_t x, int32_t y) {
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int32_t lo,hi;
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asm volatile("smull %0, %1, %2, %3\n\t"
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"movs %0, %0, lsr #15\n\t"
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"adc %1, %0, %1, lsl #17\n\t"
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: "=&r"(lo),"=&r"(hi)
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: "r"(x),"r"(y)
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: "cc" );
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return(hi);
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}
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#define XPROD32(a, b, t, v, x, y) \
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{ \
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int32_t l; \
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asm("smull %0, %1, %3, %5\n\t" \
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"rsb %2, %6, #0\n\t" \
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"smlal %0, %1, %4, %6\n\t" \
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"smull %0, %2, %3, %2\n\t" \
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"smlal %0, %2, %4, %5" \
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: "=&r" (l), "=&r" (x), "=&r" (y) \
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: "r" ((a)), "r" ((b)), "r" ((t)), "r" ((v)) ); \
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}
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#if ARM_ARCH >= 6
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/* These may yield slightly different result from the macros below
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because only the high 32 bits of the multiplications are accumulated while
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the below macros use a 64 bit accumulator that is truncated to 32 bits.*/
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#define XPROD31_R(_a, _b, _t, _v, _x, _y)\
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{\
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int32_t x1, y1;\
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asm("smmul %[x1], %[t], %[a] \n\t"\
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"smmul %[y1], %[t], %[b] \n\t"\
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"smmla %[x1], %[v], %[b], %[x1] \n\t"\
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"smmls %[y1], %[v], %[a], %[y1] \n\t"\
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: [x1] "=&r" (x1), [y1] "=&r" (y1)\
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: [a] "r" (_a), [b] "r" (_b), [t] "r" (_t), [v] "r" (_v) );\
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_x = x1 << 1;\
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_y = y1 << 1;\
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}
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#define XNPROD31_R(_a, _b, _t, _v, _x, _y)\
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{\
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int32_t x1, y1;\
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asm("smmul %[x1], %[t], %[a] \n\t"\
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"smmul %[y1], %[t], %[b] \n\t"\
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"smmls %[x1], %[v], %[b], %[x1] \n\t"\
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"smmla %[y1], %[v], %[a], %[y1] \n\t"\
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: [x1] "=&r" (x1), [y1] "=&r" (y1)\
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: [a] "r" (_a), [b] "r" (_b), [t] "r" (_t), [v] "r" (_v) );\
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_x = x1 << 1;\
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_y = y1 << 1;\
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}
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#else
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#define XPROD31_R(_a, _b, _t, _v, _x, _y)\
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{\
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int32_t x1, y1, l;\
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asm("smull %0, %1, %5, %3\n\t"\
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"rsb %2, %3, #0\n\t"\
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"smlal %0, %1, %6, %4\n\t"\
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"smull %0, %2, %6, %2\n\t"\
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"smlal %0, %2, %5, %4"\
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: "=&r" (l), "=&r" (x1), "=&r" (y1)\
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: "r" (_a), "r" (_b), "r" (_t), "r" (_v) );\
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_x = x1 << 1;\
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_y = y1 << 1;\
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}
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#define XNPROD31_R(_a, _b, _t, _v, _x, _y)\
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{\
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int32_t x1, y1, l;\
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asm("smull %0, %1, %5, %3\n\t"\
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"rsb %2, %4, #0\n\t"\
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"smlal %0, %1, %6, %2\n\t"\
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"smull %0, %2, %5, %4\n\t"\
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"smlal %0, %2, %6, %3"\
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: "=&r" (l), "=&r" (x1), "=&r" (y1)\
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: "r" (_a), "r" (_b), "r" (_t), "r" (_v) );\
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_x = x1 << 1;\
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_y = y1 << 1;\
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}
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#endif
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static inline void XPROD31(int32_t a, int32_t b,
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int32_t t, int32_t v,
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int32_t *x, int32_t *y)
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{
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int32_t _x1, _y1;
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XPROD31_R(a, b, t, v, _x1, _y1);
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*x = _x1;
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*y = _y1;
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}
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static inline void XNPROD31(int32_t a, int32_t b,
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int32_t t, int32_t v,
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int32_t *x, int32_t *y)
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{
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int32_t _x1, _y1;
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XNPROD31_R(a, b, t, v, _x1, _y1);
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*x = _x1;
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*y = _y1;
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}
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#ifndef _V_VECT_OPS
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#define _V_VECT_OPS
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/* asm versions of vector operations for block.c, window.c */
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static inline
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void vect_add(int32_t *x, int32_t *y, int n)
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{
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while (n>=4) {
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asm volatile ("ldmia %[x], {r0, r1, r2, r3};"
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"ldmia %[y]!, {r4, r5, r6, r7};"
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"add r0, r0, r4;"
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"add r1, r1, r5;"
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"add r2, r2, r6;"
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"add r3, r3, r7;"
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"stmia %[x]!, {r0, r1, r2, r3};"
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: [x] "+r" (x), [y] "+r" (y)
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: : "r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7",
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"memory");
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n -= 4;
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}
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/* add final elements */
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while (n>0) {
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*x++ += *y++;
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n--;
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}
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}
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static inline
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void vect_copy(int32_t *x, int32_t *y, int n)
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{
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while (n>=4) {
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asm volatile ("ldmia %[y]!, {r0, r1, r2, r3};"
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"stmia %[x]!, {r0, r1, r2, r3};"
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: [x] "+r" (x), [y] "+r" (y)
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: : "r0", "r1", "r2", "r3",
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"memory");
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n -= 4;
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}
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/* copy final elements */
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while (n>0) {
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*x++ = *y++;
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n--;
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}
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}
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static inline
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void vect_mult_fw(int32_t *data, int32_t *window, int n)
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{
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while (n>=4) {
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asm volatile ("ldmia %[d], {r0, r1, r2, r3};"
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"ldmia %[w]!, {r4, r5, r6, r7};"
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"smull r8, r9, r0, r4;"
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"mov r0, r9, lsl #1;"
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"smull r8, r9, r1, r5;"
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"mov r1, r9, lsl #1;"
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"smull r8, r9, r2, r6;"
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"mov r2, r9, lsl #1;"
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"smull r8, r9, r3, r7;"
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"mov r3, r9, lsl #1;"
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"stmia %[d]!, {r0, r1, r2, r3};"
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: [d] "+r" (data), [w] "+r" (window)
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: : "r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7", "r8", "r9",
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"memory" );
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n -= 4;
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}
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while(n>0) {
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*data = MULT31(*data, *window);
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data++;
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window++;
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n--;
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}
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}
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static inline
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void vect_mult_bw(int32_t *data, int32_t *window, int n)
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{
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while (n>=4) {
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asm volatile ("ldmia %[d], {r0, r1, r2, r3};"
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"ldmda %[w]!, {r4, r5, r6, r7};"
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"smull r8, r9, r0, r7;"
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"mov r0, r9, lsl #1;"
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"smull r8, r9, r1, r6;"
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"mov r1, r9, lsl #1;"
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"smull r8, r9, r2, r5;"
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"mov r2, r9, lsl #1;"
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"smull r8, r9, r3, r4;"
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"mov r3, r9, lsl #1;"
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"stmia %[d]!, {r0, r1, r2, r3};"
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: [d] "+r" (data), [w] "+r" (window)
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: : "r0", "r1", "r2", "r3",
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"r4", "r5", "r6", "r7", "r8", "r9",
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"memory" );
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n -= 4;
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}
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while(n>0) {
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*data = MULT31(*data, *window);
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data++;
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window--;
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n--;
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}
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}
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#endif
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#endif
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/* not used anymore */
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/*
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#ifndef _V_CLIP_MATH
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#define _V_CLIP_MATH
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static inline int32_t CLIP_TO_15(int32_t x) {
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int tmp;
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asm volatile("subs %1, %0, #32768\n\t"
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"movpl %0, #0x7f00\n\t"
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"orrpl %0, %0, #0xff\n"
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"adds %1, %0, #32768\n\t"
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"movmi %0, #0x8000"
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: "+r"(x),"=r"(tmp)
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:
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: "cc");
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return(x);
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}
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#endif
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*/
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#ifndef _V_LSP_MATH_ASM
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#define _V_LSP_MATH_ASM
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#endif
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#endif
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