98bd2231ec
PMU interrupts are used to detect USB Vbus, wall adaptor, accessories and holdswitch. A thread is needed to poll the PMU throught I2C, ATM it does nothing but showing the state of the inputs on the HW debug menu, funcionallity for each individual input will be added in next patches. Change-Id: If93bf2044d1052729237a7fd1431c8493e09f1c7
432 lines
11 KiB
C
432 lines
11 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: pmu-nano2g.c 27752 2010-08-08 10:49:32Z bertrik $
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*
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* Copyright © 2008 Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "kernel.h"
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#include "thread.h"
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#include "pmu-target.h"
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#include "i2c-s5l8702.h"
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#include "gpio-s5l8702.h"
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static struct mutex pmu_adc_mutex;
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int pmu_read_multiple(int address, int count, unsigned char* buffer)
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{
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return i2c_read(0, 0xe6, address, count, buffer);
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}
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int pmu_write_multiple(int address, int count, unsigned char* buffer)
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{
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return i2c_write(0, 0xe6, address, count, buffer);
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}
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unsigned char pmu_read(int address)
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{
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unsigned char tmp;
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pmu_read_multiple(address, 1, &tmp);
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return tmp;
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}
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int pmu_write(int address, unsigned char val)
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{
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return pmu_write_multiple(address, 1, &val);
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}
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int pmu_read_adc(unsigned int adc)
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{
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int data = 0;
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mutex_lock(&pmu_adc_mutex);
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pmu_write(0x54, 5 | (adc << 4));
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while ((data & 0x80) == 0)
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{
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yield();
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data = pmu_read(0x57);
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}
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int value = (pmu_read(0x55) << 2) | (data & 3);
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mutex_unlock(&pmu_adc_mutex);
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return value;
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}
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/* millivolts */
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int pmu_read_battery_voltage(void)
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{
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return (pmu_read_adc(1) * 2000 / 1023) + 2250;
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}
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/* milliamps */
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int pmu_read_battery_current(void)
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{
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//TODO: Figure out how to read the battery current
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// return pmu_read_adc(2);
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return 0;
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}
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void pmu_ldo_on_in_standby(unsigned int ldo, int onoff)
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{
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if (ldo < 4)
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{
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unsigned char newval = pmu_read(0x3B) & ~(1 << (2 * ldo));
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if (onoff) newval |= 1 << (2 * ldo);
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pmu_write(0x3B, newval);
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}
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else if (ldo < 8)
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{
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unsigned char newval = pmu_read(0x3C) & ~(1 << (2 * (ldo - 4)));
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if (onoff) newval |= 1 << (2 * (ldo - 4));
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pmu_write(0x3C, newval);
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}
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}
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void pmu_ldo_set_voltage(unsigned int ldo, unsigned char voltage)
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{
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if (ldo > 6) return;
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pmu_write(0x2d + (ldo << 1), voltage);
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}
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void pmu_hdd_power(bool on)
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{
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pmu_write(0x1b, on ? 1 : 0);
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}
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void pmu_ldo_power_on(unsigned int ldo)
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{
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if (ldo > 6) return;
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pmu_write(0x2e + (ldo << 1), 1);
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}
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void pmu_ldo_power_off(unsigned int ldo)
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{
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if (ldo > 6) return;
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pmu_write(0x2e + (ldo << 1), 0);
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}
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void pmu_set_wake_condition(unsigned char condition)
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{
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pmu_write(0xd, condition);
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}
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void pmu_enter_standby(void)
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{
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pmu_write(0xc, 1);
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}
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void pmu_read_rtc(unsigned char* buffer)
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{
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pmu_read_multiple(0x59, 7, buffer);
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}
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void pmu_write_rtc(unsigned char* buffer)
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{
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pmu_write_multiple(0x59, 7, buffer);
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}
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/*
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* eINT
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*/
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#define Q_EINT 0
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static char pmu_thread_stack[DEFAULT_STACK_SIZE/4];
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static struct event_queue pmu_queue;
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static unsigned char ints_msk[6];
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static void pmu_eint_isr(struct eint_handler*);
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static struct eint_handler pmu_eint = {
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.gpio_n = GPIO_EINT_PMU,
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.type = EIC_INTTYPE_LEVEL,
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.level = EIC_INTLEVEL_LOW,
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.isr = pmu_eint_isr,
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};
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static int pmu_input_holdswitch;
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static int pmu_input_usb;
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int pmu_holdswitch_locked(void)
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{
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return pmu_input_holdswitch;
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}
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int pmu_usb_present(void)
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{
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return pmu_input_usb;
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}
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#ifdef IPOD_ACCESSORY_PROTOCOL
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static int pmu_input_accessory;
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int pmu_accessory_present(void)
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{
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return pmu_input_accessory;
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}
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#endif
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#if CONFIG_CHARGING
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static int pmu_input_firewire;
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int pmu_firewire_present(void)
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{
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return pmu_input_firewire;
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}
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static void pmu_read_inputs_mbcs(void)
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{
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pmu_input_firewire = !!(pmu_read(PCF5063X_REG_MBCS1)
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& PCF5063X_MBCS1_ADAPTPRES);
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}
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#endif
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static void pmu_read_inputs_gpio(void)
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{
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pmu_input_holdswitch = !(pmu_read(PCF50635_REG_GPIOSTAT)
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& PCF50635_GPIOSTAT_GPIO2);
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}
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static void pmu_read_inputs_ooc(void)
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{
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unsigned char oocstat = pmu_read(PCF5063X_REG_OOCSTAT);
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pmu_input_usb = !!(oocstat & PCF5063X_OOCSTAT_EXTON2);
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#ifdef IPOD_ACCESSORY_PROTOCOL
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pmu_input_accessory = !(oocstat & PCF5063X_OOCSTAT_EXTON3);
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#endif
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}
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static void pmu_eint_isr(struct eint_handler *h)
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{
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eint_unregister(h);
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queue_post(&pmu_queue, Q_EINT, 0);
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}
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static void NORETURN_ATTR pmu_thread(void)
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{
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struct queue_event ev;
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unsigned char ints[6];
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while (true)
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{
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queue_wait_w_tmo(&pmu_queue, &ev, TIMEOUT_BLOCK);
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switch (ev.id)
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{
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case Q_EINT:
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/* read (clear) PMU interrupts, this will also
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raise the PMU IRQ pin */
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pmu_read_multiple(PCF5063X_REG_INT1, 2, ints);
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ints[5] = pmu_read(PCF50635_REG_INT6);
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#if CONFIG_CHARGING
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if (ints[0] & ~ints_msk[0]) pmu_read_inputs_mbcs();
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#endif
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if (ints[1] & ~ints_msk[1]) pmu_read_inputs_ooc();
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if (ints[5] & ~ints_msk[5]) pmu_read_inputs_gpio();
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eint_register(&pmu_eint);
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break;
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case SYS_TIMEOUT:
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break;
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}
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}
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}
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/* main init */
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void pmu_init(void)
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{
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mutex_init(&pmu_adc_mutex);
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queue_init(&pmu_queue, false);
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create_thread(pmu_thread,
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pmu_thread_stack, sizeof(pmu_thread_stack), 0,
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"PMU" IF_PRIO(, PRIORITY_SYSTEM) IF_COP(, CPU));
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/* configure PMU interrutps */
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for (int i = 0; i < 6; i++)
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ints_msk[i] = 0xff;
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#if CONFIG_CHARGING
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ints_msk[0] &= ~PCF5063X_INT1_ADPINS & /* FireWire */
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~PCF5063X_INT1_ADPREM;
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#endif
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ints_msk[1] &= ~PCF5063X_INT2_EXTON2R & /* USB */
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~PCF5063X_INT2_EXTON2F;
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#ifdef IPOD_ACCESSORY_PROTOCOL
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ints_msk[1] &= ~PCF5063X_INT2_EXTON3R & /* Accessory */
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~PCF5063X_INT2_EXTON3F;
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#endif
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ints_msk[5] &= ~PCF50635_INT6_GPIO2; /* Holdswitch */
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pmu_write_multiple(PCF5063X_REG_INT1M, 5, ints_msk);
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pmu_write(PCF50635_REG_INT6M, ints_msk[5]);
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/* clear all */
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unsigned char ints[5];
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pmu_read_multiple(PCF5063X_REG_INT1, 5, ints);
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pmu_read(PCF50635_REG_INT6);
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/* get initial values */
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#if CONFIG_CHARGING
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pmu_read_inputs_mbcs();
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#endif
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pmu_read_inputs_ooc();
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pmu_read_inputs_gpio();
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eint_register(&pmu_eint);
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}
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/*
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* preinit
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*/
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int pmu_rd_multiple(int address, int count, unsigned char* buffer)
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{
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return i2c_rd(0, 0xe6, address, count, buffer);
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}
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int pmu_wr_multiple(int address, int count, unsigned char* buffer)
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{
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return i2c_wr(0, 0xe6, address, count, buffer);
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}
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unsigned char pmu_rd(int address)
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{
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unsigned char val;
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pmu_rd_multiple(address, 1, &val);
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return val;
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}
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int pmu_wr(int address, unsigned char val)
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{
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return pmu_wr_multiple(address, 1, &val);
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}
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void pmu_preinit(void)
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{
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static const char init_data[] =
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{
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/* reset OOC shutdown register */
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PCF5063X_REG_OOCSHDWN, 0x0,
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/* LDO_UNK1: 3000 mV, enabled */
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PCF5063X_REG_LDO1OUT, 0x15,
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PCF5063X_REG_LDO1ENA, 0x1,
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/* LDO_UNK2: 3000 mV, enabled */
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PCF5063X_REG_LDO2OUT, 0x15,
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PCF5063X_REG_LDO2ENA, 0x1,
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/* LDO_LCD: 3000 mV, enabled */
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PCF5063X_REG_LDO3OUT, 0x15,
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PCF5063X_REG_LDO3ENA, 0x1,
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/* LDO_CODEC: 1800 mV, enabled */
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PCF5063X_REG_LDO4OUT, 0x9,
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PCF5063X_REG_LDO4ENA, 0x1,
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/* LDO_UNK5: 3000 mV, disabled */
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PCF5063X_REG_LDO5OUT, 0x15,
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PCF5063X_REG_LDO5ENA, 0x0,
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/* LDO_CWHEEL: 3000 mV, ON when GPIO2 High */
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PCF5063X_REG_LDO6OUT, 0x15,
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PCF5063X_REG_LDO6ENA, 0x4,
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/* LDO_ACCY: 3300 mV, disabled */
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PCF5063X_REG_HCLDOOUT, 0x18,
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PCF5063X_REG_HCLDOENA, 0x0,
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/* LDO_CWHEEL is ON in STANDBY state,
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LDO_CWHEEL and MEMLDO are ON in UNKNOWN state (TBC) */
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PCF5063X_REG_STBYCTL1, 0x0,
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PCF5063X_REG_STBYCTL2, 0x8c,
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/* GPIO1,2 = input, GPIO3 = output */
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PCF5063X_REG_GPIOCTL, 0x3,
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PCF5063X_REG_GPIO1CFG, 0x0,
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PCF5063X_REG_GPIO2CFG, 0x0,
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/* DOWN2 converter (SDRAM): 1800 mV, enabled,
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startup current limit = 15mA*0x10 (TBC) */
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PCF5063X_REG_DOWN2OUT, 0x2f,
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PCF5063X_REG_DOWN2ENA, 0x1,
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PCF5063X_REG_DOWN2CTL, 0x0,
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PCF5063X_REG_DOWN2MXC, 0x10,
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/* MEMLDO: 1800 mV, enabled */
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PCF5063X_REG_MEMLDOOUT, 0x9,
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PCF5063X_REG_MEMLDOENA, 0x1,
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/* AUTOLDO (HDD): 3400 mV, disabled,
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limit = 1000 mA (40mA*0x19), limit always active */
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PCF5063X_REG_AUTOOUT, 0x6f,
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#ifdef BOOTLOADER
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PCF5063X_REG_AUTOENA, 0x0,
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#endif
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PCF5063X_REG_AUTOCTL, 0x0,
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PCF5063X_REG_AUTOMXC, 0x59,
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/* Vsysok = 3100 mV */
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PCF5063X_REG_SVMCTL, 0x8,
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/* Reserved */
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0x58, 0x0,
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/* Mask all PMU interrupts */
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PCF5063X_REG_INT1M, 0xff,
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PCF5063X_REG_INT2M, 0xff,
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PCF5063X_REG_INT3M, 0xff,
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PCF5063X_REG_INT4M, 0xff,
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PCF5063X_REG_INT5M, 0xff,
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PCF50635_REG_INT6M, 0xff,
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/* Wakeup on rising edge for EXTON1 and EXTON2,
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wakeup on falling edge for EXTON3 and !ONKEY,
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wakeup on RTC alarm, wakeup on adapter insert,
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Vbat status has no effect in state machine */
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PCF5063X_REG_OOCWAKE, 0xdf,
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PCF5063X_REG_OOCTIM1, 0xaa,
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PCF5063X_REG_OOCTIM2, 0x4a,
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PCF5063X_REG_OOCMODE, 0x5,
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PCF5063X_REG_OOCCTL, 0x27,
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/* GPO selection = LED external NFET drive signal */
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PCF5063X_REG_GPOCFG, 0x1,
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/* LED converter OFF, overvoltage protection enabled,
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OCP limit is 500 mA, led_dimstep = 16*0x6/32768 */
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#ifdef BOOTLOADER
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PCF5063X_REG_LEDENA, 0x0,
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#endif
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PCF5063X_REG_LEDCTL, 0x5,
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PCF5063X_REG_LEDDIM, 0x6,
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/* end marker */
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0
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};
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const char* ptr;
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for (ptr = init_data; *ptr != 0; ptr += 2)
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pmu_wr(ptr[0], ptr[1]);
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/* clear PMU interrupts */
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unsigned char rd_buf[5];
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pmu_rd_multiple(PCF5063X_REG_INT1, 5, rd_buf);
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pmu_rd(PCF50635_REG_INT6);
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}
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