fdb98c258f
Add lua code to check whether ei/di and ext instructions are supported. This
is unclear since xburst is somewhere between mips32r1 and mips32r2. Details
results are below, but in summary: they don't work (ei has no effect, di/ext
cause illegal instruction exceptions)
> ./hwstub_shell -q -b -e 'require("jz/misc"); JZ.misc.enable_sram()' \
-f lua/xburst.lua -e "XBURST.test_ext_inst(0xb32d0000)"
[...]
Selecting soc jz4760b. Redirecting HW to hwstub.soc.jz4760b
data: d7168acf
error: lua/xburst.lua:209: call failed
trapped exception in call
> ./hwstub_shell -q -b -e 'require("jz/misc"); JZ.misc.enable_sram()' \
-f lua/xburst.lua -e "XBURST.test_ei_di_inst(0xb32d0000)"
[...]
Selecting soc jz4760b. Redirecting HW to hwstub.soc.jz4760b
Testing ei
Test SR
Enable interrupts with CP0
SR: 0x1
Disable interrupts with CP0
SR: 0x0
Test ei/di
Enable interrupts with ei
SR: 0x0
Disable interrupts with di
error: lua/xburst.lua:244: call failed
trapped exception in call
Change-Id: I2e162b5dd5e70488bcd8b58f3ca401a3ecab3c4b
305 lines
11 KiB
Lua
305 lines
11 KiB
Lua
XBURST = {}
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function XBURST.read_cp0(reg, sel)
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return DEV.read32_cop({0, reg, sel})
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end
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function XBURST.write_cp0(reg, sel, val)
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DEV.write32_cop({0, reg, sel}, val)
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end
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XBURST.prid_table = {
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[0x0ad0024f] = "JZ4740",
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[0x1ed0024f] = "JZ4755",
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[0x2ed0024f] = "JZ4760(B)",
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[0x3ee1024f] = "JZ4780"
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}
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XBURST.at_table = {
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[0] = "MIPS32",
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[1] = "MIPS64 with 32-bit segments",
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[2] = "MIPS64"
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}
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XBURST.ar_table = {
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[0] = "Release 1",
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[1] = "Release 2 (or more)"
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}
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XBURST.mt_table = {
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[0] = "None",
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[1] = "Standard TLB",
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[2] = "BAT",
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[3] = "Fixed Mapping",
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[4] = "Dual VTLB and FTLB"
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}
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XBURST.is_table = {
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[0] = 64,
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[1] = 128,
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[2] = 256,
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[3] = 512,
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[4] = 1024,
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[5] = 2048,
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[6] = 4096,
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[7] = 32
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}
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XBURST.il_table = {
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[0] = 0,
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[1] = 4,
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[2] = 8,
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[3] = 16,
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[4] = 32,
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[5] = 64,
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[6] = 128
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}
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function XBURST.get_table_or(tbl, index, dflt)
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if tbl[index] ~= nil then
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return tbl[index]
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else
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return dflt
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end
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end
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function XBURST.do_ebase_test()
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XBURST.write_cp0(15, 1, 0x80000000)
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print(string.format(" Value after writing 0x80000000: 0x%x", XBURST.read_cp0(15, 1)))
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if XBURST.read_cp0(15, 1) ~= 0x80000000 then
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return "Value 0x8000000 does not stick, EBASE is probably not working"
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end
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XBURST.write_cp0(15, 1, 0x80040000)
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print(string.format(" Value after writing 0x80040000: 0x%x", XBURST.read_cp0(15, 1)))
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if XBURST.read_cp0(15, 1) ~= 0x80040000 then
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return "Value 0x80040000 does not stick, EBASE is probably not working"
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end
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return "EBase seems to work"
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end
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function XBURST.do_ebase_cfg7gate_test()
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-- test gate in config7
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config7_old = XBURST.read_cp0(16, 7)
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XBURST.write_cp0(16, 7, bit32.replace(config7_old, 0, 7)) -- disable EBASE[30] modification
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print(string.format(" Disable config7 gate: write 0x%x to Config7", bit32.replace(config7_old, 0, 7)))
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XBURST.write_cp0(15, 1, 0xfffff000)
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print(string.format(" Value after writing 0xfffff000: 0x%x", XBURST.read_cp0(15, 1)))
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if XBURST.read_cp0(15, 1) == 0xfffff000 then
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return "Config7 gate has no effect but modifications are allowed anyway"
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end
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XBURST.write_cp0(16, 7, bit32.replace(config7_old, 1, 7)) -- enable EBASE[30] modification
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print(string.format(" Enable config7 gate: write 0x%x to Config7", bit32.replace(config7_old, 1, 7)))
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XBURST.write_cp0(15, 1, 0xc0000000)
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print(string.format(" Value after writing 0xc0000000: 0x%x", XBURST.read_cp0(15, 1)))
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if XBURST.read_cp0(15, 1) ~= 0xc0000000 then
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return "Config7 gate does not work"
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end
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XBURST.write_cp0(16, 7, config7_old)
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return "Config7 gate seems to work"
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end
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function XBURST.do_ebase_exc_test(mem_addr)
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if (mem_addr % 0x1000) ~= 0 then
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return " memory address for exception test must aligned on a 0x1000 boundary";
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end
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print(string.format("Exception test with EBASE at 0x%x...", mem_addr))
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print(" Writing instructions to memory")
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-- create instructions in memory
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exc_addr = mem_addr + 0x180 -- general exception vector
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data_addr = mem_addr + 0x300
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-- lui k0,<low part of data_addr>
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-- ori k0,k0,<high part>
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DEV.write32(exc_addr + 0, 0x3c1a0000 + bit32.rshift(data_addr, 16))
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DEV.write32(exc_addr + 4, 0x375a0000 + bit32.band(data_addr, 0xffff))
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-- lui k1,0xdead
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-- ori k1,k1,0xbeef
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DEV.write32(exc_addr + 8, 0x3c1bdead)
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DEV.write32(exc_addr + 12, 0x377bbeef)
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-- sw k1,0(k0)
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DEV.write32(exc_addr + 16, 0xaf5b0000)
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-- mfc0 k0,c0_epc
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-- addi k0,k0,4
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-- mtc0 k0,c0_epc
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DEV.write32(exc_addr + 20, 0x401a7000)
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DEV.write32(exc_addr + 24, 0x235a0004)
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DEV.write32(exc_addr + 28, 0x409a7000)
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-- eret
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-- nop
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DEV.write32(exc_addr + 32, 0x42000018)
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DEV.write32(exc_addr + 36, 0)
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-- fill data with some initial value
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DEV.write32(data_addr, 0xcafebabe)
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-- write instructions to trigger an interrupt
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bug_addr = mem_addr
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-- syscall
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DEV.write32(bug_addr + 0, 0x0000000c)
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-- jr ra
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-- nop
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DEV.write32(bug_addr + 4, 0x03e00008)
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DEV.write32(bug_addr + 8, 0)
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-- make sure we are the right shape for the test: SR should have BEV cleared,
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-- mask all interrupts, enable interrupts
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old_sr = XBURST.read_cp0(12, 0)
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print(string.format(" Old SR: 0x%x", old_sr))
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XBURST.write_cp0(12, 0, 0xfc00) -- BEV set to 0, all interrupts masked and interrupt disabled
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print(string.format(" New SR: 0x%x", XBURST.read_cp0(12, 0)))
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-- change EBASE
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old_ebase = XBURST.read_cp0(15, 1)
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XBURST.write_cp0(15, 1, mem_addr)
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print(string.format(" EBASE: %x", XBURST.read_cp0(15, 1)))
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-- test
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print(string.format(" Before: %x", DEV.read32(data_addr)))
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DEV.call(bug_addr)
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print(string.format(" After: %x", DEV.read32(data_addr)))
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success = DEV.read32(data_addr) == 0xdeadbeef
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-- restore SR and EBASE
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XBURST.write_cp0(12, 0, old_sr)
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XBURST.write_cp0(15, 1, ebase_old)
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return success and "Exception and EBASE are working" or "Exception and EBASE are NOT working"
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end
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function XBURST.test_ebase(mem_addr)
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-- EBase
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ebase_old = XBURST.read_cp0(15, 1)
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sr_old = XBURST.read_cp0(12, 0)
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print("Testing EBASE...")
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print(" Disable BEV")
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XBURST.write_cp0(12, 0, bit32.replace(sr_old, 0, 22)) -- clear BEV
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print(string.format(" SR value: 0x%x", XBURST.read_cp0(12, 0)))
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print(string.format(" EBASE value: 0x%x", ebase_old))
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print(" Test result: " .. XBURST.do_ebase_test())
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print(" Config7 result: " .. XBURST.do_ebase_cfg7gate_test())
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XBURST.write_cp0(12, 0, sr_old)
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XBURST.write_cp0(15, 1, ebase_old)
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-- now try with actual exceptions
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if mem_addr == nil then
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print(" Not doing exception test, please specify memory to use: sram, ram")
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return
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end
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print(" Exception result: " .. XBURST.do_ebase_exc_test(mem_addr))
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end
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function XBURST.test_ext_inst(mem_addr)
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data_addr = mem_addr + 0x80
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-----------
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-- test ext
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-----------
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for pos = 0, 31 do
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for size = 1, 32 - pos do
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-- lui v0,<low part of data_addr>
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-- addiu v0,v0,<high part>
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-- lw v1,0(v0)
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DEV.write32(mem_addr + 0, 0x3c020000 + bit32.rshift(data_addr, 16))
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DEV.write32(mem_addr + 4, 0x8c430000 + bit32.band(data_addr, 0xffff))
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DEV.write32(mem_addr + 8, 0x8c430000)
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-- ext v1, v1, pos, size
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DEV.write32(mem_addr + 12, 0x7c630000 + bit32.rshift(size - 1, 11) + bit32.rshift(pos, 6))
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-- sw v1,0(v0)
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DEV.write32(mem_addr + 16, 0xac430000)
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-- jr ra
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-- nop
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DEV.write32(mem_addr + 20, 0x03e00008)
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DEV.write32(mem_addr + 24, 0)
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-- write some random data
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data = math.random(0xffffffff)
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print(string.format(" data: %x", data))
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DEV.write32(data_addr, data)
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DEV.call(mem_addr)
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ext_data = DEV.read32(data_addr)
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print(string.format(" result: %x vs %x", ext_data, bit32.extract(data, pos, size)))
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break
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end
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break
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end
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end
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function XBURST.test_ei_di_inst(mem_addr)
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-- save SR and disable interrupts
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old_sr = XBURST.read_cp0(12, 0)
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XBURST.write_cp0(12, 0, bit32.replace(old_sr, 0, 0)) -- clear EI
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print("Testing ei")
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print(" Test SR")
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print(" Enable interrupts with CP0")
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XBURST.write_cp0(12, 0, bit32.replace(old_sr, 1, 0)) -- set EI
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print(string.format(" SR: 0x%x", XBURST.read_cp0(12, 0)))
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print(" Disable interrupts with CP0")
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XBURST.write_cp0(12, 0, bit32.replace(old_sr, 0, 0)) -- clear EI
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print(string.format(" SR: 0x%x", XBURST.read_cp0(12, 0)))
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print(" Test ei/di")
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print(" Enable interrupts with ei")
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-- ei
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-- jr ra
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-- nop
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DEV.write32(mem_addr + 4, 0x41606020)
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DEV.write32(mem_addr + 4, 0x03e00008)
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DEV.write32(mem_addr + 8, 0)
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DEV.call(mem_addr)
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print(string.format(" SR: 0x%x", XBURST.read_cp0(12, 0)))
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print(" Disable interrupts with di")
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-- di
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DEV.write32(mem_addr + 4, 0x41606000)
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DEV.call(mem_addr)
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print(string.format(" SR: 0x%x", XBURST.read_cp0(12, 0)))
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-- restore SR
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XBURST.write_cp0(old_sr)
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end
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function XBURST.init()
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-- enable CP1 in SR
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sr_old = XBURST.read_cp0(12, 0)
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XBURST.write_cp0(12, 0, bit32.replace(sr_old, 1, 29)) -- set CU1
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print("XBurst:")
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-- PRId
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XBURST.prid = XBURST.read_cp0(15, 0)
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print(string.format(" PRId: 0x%x", XBURST.prid))
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print(" CPU: " .. XBURST.get_table_or(XBURST.prid_table, XBURST.prid, "unknown"))
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-- Config
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XBURST.config = XBURST.read_cp0(16, 0)
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print(string.format(" Config: 0x%x", XBURST.config))
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print(" Architecture Type: " .. XBURST.get_table_or(XBURST.at_table,
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bit32.extract(XBURST.config, 13, 2), "unknown"))
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print(" Architecture Level: " .. XBURST.get_table_or(XBURST.ar_table,
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bit32.extract(XBURST.config, 10, 3), "unknown"))
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print(" MMU Type: " .. XBURST.get_table_or(XBURST.mt_table,
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bit32.extract(XBURST.config, 7, 3), "unknown"))
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-- Config1
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XBURST.config1 = XBURST.read_cp0(16, 1)
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print(string.format(" Config1: 0x%x", XBURST.config1))
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-- don't print of no MMU
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if bit32.extract(XBURST.config, 7, 3) ~= 0 then
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print(string.format(" MMU Size: %d", bit32.extract(XBURST.config1, 25, 6) + 1))
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end
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print(" ICache")
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print(" Sets per way: " .. XBURST.get_table_or(XBURST.is_table,
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bit32.extract(XBURST.config1, 22, 3), "unknown"))
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print(" Ways: " .. (1 + bit32.extract(XBURST.config1, 16, 3)))
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print(" Line size: " .. XBURST.get_table_or(XBURST.il_table,
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bit32.extract(XBURST.config1, 19, 3), "unknown"))
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print(" DCache")
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print(" Sets per way: " .. XBURST.get_table_or(XBURST.is_table,
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bit32.extract(XBURST.config1, 13, 3), "unknown"))
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print(" Ways: " .. (1 + bit32.extract(XBURST.config1, 7, 3)))
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print(" Line size: " .. XBURST.get_table_or(XBURST.il_table,
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bit32.extract(XBURST.config1, 10, 3), "unknown"))
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print(" FPU: " .. (bit32.extract(XBURST.config1, 0) == 1 and "yes" or "no"))
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-- Config 2
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XBURST.config2 = XBURST.read_cp0(16, 2)
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print(string.format(" Config2: 0x%x", XBURST.config2))
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-- Config 3
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XBURST.config3 = XBURST.read_cp0(16, 3)
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print(string.format(" Config3: 0x%x", XBURST.config3))
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print(" Vectored interrupt: " .. (bit32.extract(XBURST.config2, 5) and "yes" or "no"))
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-- Config 7
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XBURST.config7 = XBURST.read_cp0(16, 7)
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print(string.format(" Config7: 0x%x", XBURST.config7))
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-- restore SR
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XBURST.write_cp0(12, 0, sr_old)
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end
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