rockbox/firmware/target/arm/s5l8700
Bertrik Sikken daff26b1da Meizu M3: configure and use SDRAM
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23614 a1c6a512-1295-4272-9138-f99709370657
2009-11-11 21:31:38 +00:00
..
ipodnano2g Squash another bunch of iPod Nano 2G NAND bugs by moving the idle powerdown code down into the lowlevel driver. Move even more things from the FTL to the bss instead of the stack to prevent USB stkovs. Also fix some evil whitespace. 2009-11-08 14:55:30 +00:00
meizu-m3
meizu-m6sl
meizu-m6sp Meizu M6SP: initial button driver (adapted from Meizu M3) 2009-11-07 21:37:28 +00:00
yps3 Samsung YP-S3: make bootloader compile again 2009-10-11 13:15:23 +00:00
adc-s5l8700.c
adc-target.h
app.lds
ata-nand-s5l8700.c Squash another bunch of iPod Nano 2G NAND bugs by moving the idle powerdown code down into the lowlevel driver. Move even more things from the FTL to the bss instead of the stack to prevent USB stkovs. Also fix some evil whitespace. 2009-11-08 14:55:30 +00:00
backlight-meizu.c
backlight-target.h
boot.lds Meizu M3: configure and use SDRAM 2009-11-11 21:31:38 +00:00
crt0.S Meizu M3: configure and use SDRAM 2009-11-11 21:31:38 +00:00
debug-s5l8700.c
debug-target.h
dma-s5l8700.c
dma-target.h
fmradio-i2c-meizu.c
i2c-s5l8700.c
kernel-s5l8700.c Adjust iPod Nano 2G CPU speed to 192MHz, which measurements show it to be. Timers will be more accurate now. 2009-10-17 22:32:46 +00:00
mmu-s5l8700.S Fix S5L870x cache coherency functions. They were split into a different file, as changes were needed all over the place. 2009-10-17 23:06:45 +00:00
mmu-target.h Fix S5L870x cache coherency functions. They were split into a different file, as changes were needed all over the place. 2009-10-17 23:06:45 +00:00
pcm-s5l8700.c pcm-s5l8700: add missing header file, remove out-of-date comment 2009-11-11 20:30:53 +00:00
power-meizu.c power-meizu.c: fix usage of USB_TR name 2009-10-25 09:54:23 +00:00
system-s5l8700.c Fix red 2009-10-23 23:58:54 +00:00
system-target.h Adjust the iPod Nano 2G CPU clock freq again, this time to an exact value. Also add hardware defines for the 9th DMA channel we discovered on the S5L8701, and fix the µsec timer (there were missing braces). 2009-10-24 23:27:13 +00:00
timer-s5l8700.c
udacodec-meizu.c
wmcodec-s5l8700.c