ef572fec52
Change-Id: I8d1561bf4e239b55617a8d5075457a668e0c312c
138 lines
3.3 KiB
C
138 lines
3.3 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2014 Michael Sparmann
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <inttypes.h>
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#include "config.h"
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#include "usb.h"
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#include "usb_drv.h"
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#ifdef HAVE_USBSTACK
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#include "usb_core.h"
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#include "power.h"
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#endif
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#include "s5l8700.h"
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#include "usb-designware.h"
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const struct usb_dw_config usb_dw_config =
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{
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/* PHY must run at 60MHz, otherwise there are spurious -EPROTO
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errors, probably related with GHWCFG4_MIN_AHB_FREQ. */
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.phytype = DWC_PHYTYPE_UTMI_8,
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/*
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* Total available FIFO memory: 0x500 words.
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*/
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.rx_fifosz = 0x220,
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/* nptx_fifosz seems limited to 0x200 due to some internal counter
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misbehaviour (TBC). */
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.nptx_fifosz = 0x200,
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/* ptx_fifosz is not writeable (fixed to 0x300), anyway it seems
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internally limited to a small number, aroung 0x10..0x20 (TBC),
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we use_ptxfifo_as_plain_buffer to deal with this issue. */
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.ptx_fifosz = 0x80,
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.use_ptxfifo_as_plain_buffer = true,
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#ifdef USB_DW_ARCH_SLAVE
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.disable_double_buffering = false,
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#else
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.ahb_burst_len = HBSTLEN_INCR4,
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#endif
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};
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void usb_dw_target_enable_clocks()
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{
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PWRCON &= ~0x4000;
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PWRCONEXT &= ~0x800;
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OPHYPWR = 0; /* PHY: Power up */
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udelay(10);
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OPHYUNK1 = 1;
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OPHYUNK2 = 0xe3f;
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ORSTCON = 1; /* PHY: Assert Software Reset */
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udelay(10);
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ORSTCON = 0; /* PHY: Deassert Software Reset */
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udelay(10);
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OPHYUNK3 = 0x600;
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OPHYCLK = USB_DW_CLOCK;
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udelay(400);
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}
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void usb_dw_target_disable_clocks()
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{
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OPHYPWR = 0xf; /* PHY: Power down */
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udelay(10);
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ORSTCON = 7; /* PHY: Assert Software Reset */
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udelay(10);
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PWRCON |= 0x4000;
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PWRCONEXT |= 0x800;
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}
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void usb_dw_target_enable_irq()
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{
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INTMSK |= INTMSK_USB_OTG;
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}
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void usb_dw_target_disable_irq()
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{
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INTMSK &= ~INTMSK_USB_OTG;
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}
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void usb_dw_target_clear_irq()
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{
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SRCPND |= INTMSK_USB_OTG;
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}
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/* RB API fuctions */
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void usb_enable(bool on)
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{
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#ifdef HAVE_USBSTACK
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if (on){
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cpu_boost(1);
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usb_core_init();
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} else {
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usb_core_exit();
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cpu_boost(0);
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}
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#else
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(void)on;
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#endif
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}
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int usb_detect(void)
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{
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#ifdef HAVE_USBSTACK
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if (power_input_status() & POWER_INPUT_USB)
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return USB_INSERTED;
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#endif
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return USB_EXTRACTED;
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}
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void usb_init_device(void)
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{
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/* Power up the core clocks to allow writing
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to some registers needed to power it down */
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usb_dw_target_disable_irq();
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usb_dw_target_enable_clocks();
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usb_drv_exit();
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}
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